mmc: dw_mmc: control card read threshold

Card Read Threshold should be ensured that the card clock does not stop
in the middle of a block of data being transferred from the card to the
Host. Specially, clock stop is allowed in fast transfer such as HS200
or SDR104 mode. And so, it should be enabled.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index acefdeb2465bd8a0b6ad9627e2ecea6ffc0d6d29..8eb37983a72a417fb5f88b4b82726eee8e230dd8 100644 (file)
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -570,6 +570,37 @@ done:
 #endif
 }
 
+static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data)
+{
+       unsigned int blksz = data->blksz;
+       u32 blksz_depth, fifo_depth;
+       u16 thld_size;
+
+       WARN_ON(!(data->flags & MMC_DATA_READ));
+
+       if (host->timing != MMC_TIMING_MMC_HS200 &&
+           host->timing != MMC_TIMING_UHS_SDR104)
+               goto disable;
+
+       blksz_depth = blksz / (1 << host->data_shift);
+       fifo_depth = host->fifo_depth;
+
+       if (blksz_depth > fifo_depth)
+               goto disable;
+
+       /*
+        * If (blksz_depth) >= (fifo_depth >> 1), should be 'thld_size <= blksz'
+        * If (blksz_depth) <  (fifo_depth >> 1), should be thld_size = blksz
+        * Currently just choose blksz.
+        */
+       thld_size = blksz;
+       mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(thld_size, 1));
+       return;
+
+disable:
+       mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(0, 0));
+}
+
 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data)
 {
        int sg_len;
@@ -627,10 +658,12 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data)
        host->sg = NULL;
        host->data = data;
 
-       if (data->flags & MMC_DATA_READ)
+       if (data->flags & MMC_DATA_READ) {
                host->dir_status = DW_MCI_RECV_STATUS;
-       else
+               dw_mci_ctrl_rd_thld(host, data);
+       } else {
                host->dir_status = DW_MCI_SEND_STATUS;
+       }
 
        if (dw_mci_submit_data_dma(host, data)) {
                int flags = SG_MITER_ATOMIC;
@@ -877,6 +910,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
                regs &= ~((0x1 << slot->id) << 16);
 
        mci_writel(slot->host, UHS_REG, regs);
+       slot->host->timing = ios->timing;
 
        /*
         * Use mirror of ios->clock to prevent race with mmc

diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index a0f2f8d35f5d1e3df64a1c1f8eba9c80a3c1fee6..6bf24ab917e6453a22d09689befd58e40fa96efd 100644 (file)
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -53,6 +53,7 @@
 #define SDMMC_IDINTEN          0x090
 #define SDMMC_DSCADDR          0x094
 #define SDMMC_BUFADDR          0x098
+#define SDMMC_CDTHRCTL         0x100
 #define SDMMC_DATA(x)          (x)
 
 /*
@@ -146,6 +147,8 @@
 #define SDMMC_IDMAC_SWRESET            BIT(0)
 /* Version ID register define */
 #define SDMMC_GET_VERID(x)             ((x) & 0xFFFF)
+/* Card read threshold */
+#define SDMMC_SET_RD_THLD(v, x)                (((v) & 0x1FFF) << 16 | (x))
 
 /* Register access macros */
 #define mci_readl(dev, reg)                    \

diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 4ec9dcc9460e980e2d7a694cdee0830d9431b4f2..a829f7ee28c896adb06dd00cf711969e0ea364d7 100644 (file)
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -130,6 +130,7 @@ struct dw_mci {
        struct mmc_command      *cmd;
        struct mmc_data         *data;
        unsigned int            prev_blksz;
+       unsigned char           timing;
        struct workqueue_struct *card_workqueue;
 
        /* DMA interface members*/