clocksource: exynos_mct: Add the support for ARM64
authorChanwoo Choi <cw00.choi@samsung.com>
Wed, 24 Aug 2016 13:49:05 +0000 (22:49 +0900)
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>
Fri, 16 Sep 2016 11:07:53 +0000 (13:07 +0200)
This patch allows building and compile-testing the driver also for
ARM64.  The delay_timer is only supported on ARMv7.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[k.kozlowski: Adjusted commit msg]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
drivers/clocksource/Kconfig
drivers/clocksource/exynos_mct.c

index 567788664723d5b341000af69cc4e6194ab9025d..ec443c318c77a4d3fd1f58205e835b87d513d2b1 100644 (file)
@@ -351,7 +351,7 @@ config CLKSRC_METAG_GENERIC
 
 config CLKSRC_EXYNOS_MCT
        bool "Exynos multi core timer driver" if COMPILE_TEST
-       depends on ARM
+       depends on ARM || ARM64
        help
          Support for Multi Core Timer controller on Exynos SoCs.
 
index 41840d02c331891104631df1dac83bcb67f2a5f9..8f3488b808964b1884eaf18d602fe2ae9b4921c2 100644 (file)
@@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void)
        return exynos4_read_count_32();
 }
 
+#if defined(CONFIG_ARM)
 static struct delay_timer exynos4_delay_timer;
 
 static cycles_t exynos4_read_current_timer(void)
@@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void)
                         "cycles_t needs to move to 32-bit for ARM64 usage");
        return exynos4_read_count_32();
 }
+#endif
 
 static int __init exynos4_clocksource_init(void)
 {
        exynos4_mct_frc_start();
 
+#if defined(CONFIG_ARM)
        exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
        exynos4_delay_timer.freq = clk_rate;
        register_current_timer_delay(&exynos4_delay_timer);
+#endif
 
        if (clocksource_register_hz(&mct_frc, clk_rate))
                panic("%s: can't register clocksource\n", mct_frc.name);