MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USB
authorWu Zhangjin <wuzhangjin@gmail.com>
Wed, 19 May 2010 01:12:17 +0000 (09:12 +0800)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 5 Jul 2010 16:17:20 +0000 (17:17 +0100)
Add several missing RDMSRs for IDE and USB are missing to avoid the
agressive modification of the high 32 bits of the MSR.

Without this patch some usb devices may fail after printing "reset ehci
host ....." when reading the partition information.

Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: Hu Hongbing <huhb@lemote.com>
Patchwork: http://patchwork.linux-mips.org/patch/1250/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/loongson/common/cs5536/cs5536_ehci.c
arch/mips/loongson/common/cs5536/cs5536_ide.c
arch/mips/loongson/common/cs5536/cs5536_ohci.c

index eaf8b86e331816bcd34881607296c8e6443df44f..5b5cbba699b3fc0238dabc1dc46878e18b14df84 100644 (file)
@@ -49,6 +49,8 @@ void pci_ehci_write_reg(int reg, u32 value)
                        lo |= SOFT_BAR_EHCI_FLAG;
                        _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
                } else if ((value & 0x01) == 0x00) {
+                       _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
+                       lo = value;
                        _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
 
                        value &= 0xfffffff0;
index 9a96b5664c787930293db78e500f4be04a21775c..7ebf17a949a943ea8945630a559689b4500d6610 100644 (file)
@@ -51,6 +51,7 @@ void pci_ide_write_reg(int reg, u32 value)
                        lo |= SOFT_BAR_IDE_FLAG;
                        _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
                } else if (value & 0x01) {
+                       _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo);
                        lo = (value & 0xfffffff0) | 0x1;
                        _wrmsr(IDE_MSR_REG(IDE_IO_BAR), hi, lo);
 
@@ -65,19 +66,30 @@ void pci_ide_write_reg(int reg, u32 value)
                        _rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
                        lo |= 0x01;
                        _wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
-               } else
+               } else {
+                       _rdmsr(IDE_MSR_REG(IDE_CFG), &hi, &lo);
+                       lo = value;
                        _wrmsr(IDE_MSR_REG(IDE_CFG), hi, lo);
+               }
                break;
        case PCI_IDE_DTC_REG:
+               _rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo);
+               lo = value;
                _wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo);
                break;
        case PCI_IDE_CAST_REG:
+               _rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo);
+               lo = value;
                _wrmsr(IDE_MSR_REG(IDE_CAST), hi, lo);
                break;
        case PCI_IDE_ETC_REG:
+               _rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo);
+               lo = value;
                _wrmsr(IDE_MSR_REG(IDE_ETC), hi, lo);
                break;
        case PCI_IDE_PM_REG:
+               _rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo);
+               lo = value;
                _wrmsr(IDE_MSR_REG(IDE_INTERNAL_PM), hi, lo);
                break;
        default:
index db5900aadd6b0c923d6ccd45f295174606f71cca..bdedf512baf79fb2e97888b2d3c1f756a8c3c705 100644 (file)
@@ -49,6 +49,8 @@ void pci_ohci_write_reg(int reg, u32 value)
                        lo |= SOFT_BAR_OHCI_FLAG;
                        _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
                } else if ((value & 0x01) == 0x00) {
+                       _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
+                       lo = value;
                        _wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
 
                        value &= 0xfffffff0;