Hexagon: switch to using the device type for IO mappings

Uncached on our architecture can still have side effects
such as canceled/replayed transactions; device type prevents
this.

Signed-off-by: Richard Kuo <rkuo@codeaurora.org>

diff --git a/arch/hexagon/include/asm/vm_mmu.h b/arch/hexagon/include/asm/vm_mmu.h
index 9a94de7969bb5e192f57bb9d5bc6ca877376f23c..e67b573cfef03e4e4e5b9617d9fa60e59abce411 100644 (file)
--- a/arch/hexagon/include/asm/vm_mmu.h
+++ b/arch/hexagon/include/asm/vm_mmu.h
@@ -68,14 +68,13 @@
 
 #define __HEXAGON_C_WB         0x0     /* Write-back, no L2 */
 #define        __HEXAGON_C_WT          0x1     /* Write-through, no L2 */
+#define        __HEXAGON_C_UNC         0x6     /* Uncached memory */
+#if CONFIG_HEXAGON_ARCH_VERSION >= 2
 #define        __HEXAGON_C_DEV         0x4     /* Device register space */
-#define        __HEXAGON_C_WT_L2       0x5     /* Write-through, with L2 */
-/* this really should be #if CONFIG_HEXAGON_ARCH = 2 but that's not defined */
-#if defined(CONFIG_HEXAGON_COMET) || defined(CONFIG_QDSP6_ST1)
-#define __HEXAGON_C_UNC                __HEXAGON_C_DEV
 #else
-#define        __HEXAGON_C_UNC         0x6     /* Uncached memory */
+#define __HEXAGON_C_DEV                __HEXAGON_C_UNC
 #endif
+#define        __HEXAGON_C_WT_L2       0x5     /* Write-through, with L2 */
 #define        __HEXAGON_C_WB_L2       0x7     /* Write-back, with L2 */
 
 /*