arm: at91: move reset controller header to arm/arm/mach-at91

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>

diff --git a/arch/arm/mach-at91/at91_rstc.h b/arch/arm/mach-at91/at91_rstc.h
new file mode 100644 (file)
index 0000000..875fa33
--- /dev/null
+++ b/arch/arm/mach-at91/at91_rstc.h
@@ -0,0 +1,53 @@
+/*
+ * arch/arm/mach-at91/include/mach/at91_rstc.h
+ *
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
+ * Reset Controller (RSTC) - System peripherals regsters.
+ * Based on AT91SAM9261 datasheet revision D.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_RSTC_H
+#define AT91_RSTC_H
+
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_rstc_base;
+
+#define at91_rstc_read(field) \
+       __raw_readl(at91_rstc_base + field)
+
+#define at91_rstc_write(field, value) \
+       __raw_writel(value, at91_rstc_base + field);
+#else
+.extern at91_rstc_base
+#endif
+
+#define AT91_RSTC_CR           0x00                    /* Reset Controller Control Register */
+#define                AT91_RSTC_PROCRST       (1 << 0)                /* Processor Reset */
+#define                AT91_RSTC_PERRST        (1 << 2)                /* Peripheral Reset */
+#define                AT91_RSTC_EXTRST        (1 << 3)                /* External Reset */
+#define                AT91_RSTC_KEY           (0xa5 << 24)            /* KEY Password */
+
+#define AT91_RSTC_SR           0x04                    /* Reset Controller Status Register */
+#define                AT91_RSTC_URSTS         (1 << 0)                /* User Reset Status */
+#define                AT91_RSTC_RSTTYP        (7 << 8)                /* Reset Type */
+#define                        AT91_RSTC_RSTTYP_GENERAL        (0 << 8)
+#define                        AT91_RSTC_RSTTYP_WAKEUP         (1 << 8)
+#define                        AT91_RSTC_RSTTYP_WATCHDOG       (2 << 8)
+#define                        AT91_RSTC_RSTTYP_SOFTWARE       (3 << 8)
+#define                        AT91_RSTC_RSTTYP_USER   (4 << 8)
+#define                AT91_RSTC_NRSTL         (1 << 16)               /* NRST Pin Level */
+#define                AT91_RSTC_SRCMP         (1 << 17)               /* Software Reset Command in Progress */
+
+#define AT91_RSTC_MR           0x08                    /* Reset Controller Mode Register */
+#define                AT91_RSTC_URSTEN        (1 << 0)                /* User Reset Enable */
+#define                AT91_RSTC_URSTIEN       (1 << 4)                /* User Reset Interrupt Enable */
+#define                AT91_RSTC_ERSTL         (0xf << 8)              /* External Reset Length */
+
+#endif

diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index bb2e17c9dfb2c41fc47ef475a17080d424620e97..99429849f780e7912a435a42d13ec9559998a354 100644 (file)
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -21,9 +21,9 @@
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9260.h>
 #include <mach/at91_pmc.h>
-#include <mach/at91_rstc.h>
 
 #include "at91_aic.h"
+#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"

diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 09009d878ef89cea12b3803498e628342113ea41..c583ba22462230e67c3bd092b1470a51770c526e 100644 (file)
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -20,9 +20,9 @@
 #include <mach/cpu.h>
 #include <mach/at91sam9261.h>
 #include <mach/at91_pmc.h>
-#include <mach/at91_rstc.h>
 
 #include "at91_aic.h"
+#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"

diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 0c86aa85904bf43faf1e24f685c089c2b09396f3..500ee19eaac9ece70275fd8cb75748fdf60007e8 100644 (file)
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -19,9 +19,9 @@
 #include <asm/system_misc.h>
 #include <mach/at91sam9263.h>
 #include <mach/at91_pmc.h>
-#include <mach/at91_rstc.h>
 
 #include "at91_aic.h"
+#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"

diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index 7af2e108b8a057d65deb5b49a725b3881e9b00cd..f039538d3bdbd158874d81c10a812a0b7507c05a 100644 (file)
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -16,7 +16,7 @@
 #include <linux/linkage.h>
 #include <mach/hardware.h>
 #include <mach/at91_ramc.h>
-#include <mach/at91_rstc.h>
+#include "at91_rstc.h"
 
                        .arm
 

diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
index 9d457182c86c73f7ab5d3a0daef884781a518bbb..721a1a34dd1d86027161e66b9cfaee7161ebfd03 100644 (file)
--- a/arch/arm/mach-at91/at91sam9g45_reset.S
+++ b/arch/arm/mach-at91/at91sam9g45_reset.S
@@ -13,8 +13,7 @@
 #include <linux/linkage.h>
 #include <mach/hardware.h>
 #include <mach/at91_ramc.h>
-#include <mach/at91_rstc.h>
-
+#include "at91_rstc.h"
                        .arm
 
                        .globl  at91sam9g45_restart

diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 5cd076b569a45805215407f11c59dbe903421e7c..97dd8f15e09a61c4d2bd03b3f80bc9a87189a5f4 100644 (file)
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -20,9 +20,9 @@
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9rl.h>
 #include <mach/at91_pmc.h>
-#include <mach/at91_rstc.h>
 
 #include "at91_aic.h"
+#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"

diff --git a/arch/arm/mach-at91/include/mach/at91_rstc.h b/arch/arm/mach-at91/include/mach/at91_rstc.h
deleted file mode 100644 (file)
index 875fa33..0000000
--- a/arch/arm/mach-at91/include/mach/at91_rstc.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_rstc.h
- *
- * Copyright (C) 2007 Andrew Victor
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Reset Controller (RSTC) - System peripherals regsters.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_RSTC_H
-#define AT91_RSTC_H
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_rstc_base;
-
-#define at91_rstc_read(field) \
-       __raw_readl(at91_rstc_base + field)
-
-#define at91_rstc_write(field, value) \
-       __raw_writel(value, at91_rstc_base + field);
-#else
-.extern at91_rstc_base
-#endif
-
-#define AT91_RSTC_CR           0x00                    /* Reset Controller Control Register */
-#define                AT91_RSTC_PROCRST       (1 << 0)                /* Processor Reset */
-#define                AT91_RSTC_PERRST        (1 << 2)                /* Peripheral Reset */
-#define                AT91_RSTC_EXTRST        (1 << 3)                /* External Reset */
-#define                AT91_RSTC_KEY           (0xa5 << 24)            /* KEY Password */
-
-#define AT91_RSTC_SR           0x04                    /* Reset Controller Status Register */
-#define                AT91_RSTC_URSTS         (1 << 0)                /* User Reset Status */
-#define                AT91_RSTC_RSTTYP        (7 << 8)                /* Reset Type */
-#define                        AT91_RSTC_RSTTYP_GENERAL        (0 << 8)
-#define                        AT91_RSTC_RSTTYP_WAKEUP         (1 << 8)
-#define                        AT91_RSTC_RSTTYP_WATCHDOG       (2 << 8)
-#define                        AT91_RSTC_RSTTYP_SOFTWARE       (3 << 8)
-#define                        AT91_RSTC_RSTTYP_USER   (4 << 8)
-#define                AT91_RSTC_NRSTL         (1 << 16)               /* NRST Pin Level */
-#define                AT91_RSTC_SRCMP         (1 << 17)               /* Software Reset Command in Progress */
-
-#define AT91_RSTC_MR           0x08                    /* Reset Controller Mode Register */
-#define                AT91_RSTC_URSTEN        (1 << 0)                /* User Reset Enable */
-#define                AT91_RSTC_URSTIEN       (1 << 4)                /* User Reset Interrupt Enable */
-#define                AT91_RSTC_ERSTL         (0xf << 8)              /* External Reset Length */
-
-#endif

diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 34557400bf4d1d2d8e8426cc62c3c9297bf038fa..adb6db888a1f1ebda8a088e9ae1e5780ba4b4555 100644 (file)
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -36,7 +36,7 @@
  * Show the reason for the previous system reset.
  */
 
-#include <mach/at91_rstc.h>
+#include "at91_rstc.h"
 #include "at91_shdwc.h"
 
 static void __init show_reset_status(void)