tools/power turbostat: Decode MSR_MISC_PWR_MGMT
authorLen Brown <len.brown@intel.com>
Thu, 3 Dec 2015 06:35:36 +0000 (01:35 -0500)
committerLen Brown <len.brown@intel.com>
Wed, 17 Feb 2016 06:43:05 +0000 (01:43 -0500)
This MSR is helpful to show if P-state HW coordination
is enabled or disabled.

Signed-off-by: Len Brown <len.brown@intel.com>
tools/power/x86/turbostat/turbostat.c

index af3b955aad1d897a0eeb849dceb8de310b622f47..c600340dfc4e78a6cb8063188d1cc37dab253a6b 100644 (file)
@@ -2783,6 +2783,26 @@ void decode_misc_enable_msr(void)
                        msr & (1 << 18) ? "MONITOR" : "");
 }
 
+/*
+ * Decode MSR_MISC_PWR_MGMT
+ *
+ * Decode the bits according to the Nehalem documentation
+ * bit[0] seems to continue to have same meaning going forward
+ * bit[1] less so...
+ */
+void decode_misc_pwr_mgmt_msr(void)
+{
+       unsigned long long msr;
+
+       if (!do_nhm_platform_info)
+               return;
+
+       if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
+               fprintf(stderr, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
+                       base_cpu, msr,
+                       msr & (1 << 0) ? "DIS" : "EN",
+                       msr & (1 << 1) ? "EN" : "DIS");
+}
 
 void process_cpuid()
 {
@@ -2936,6 +2956,9 @@ void process_cpuid()
        do_slm_cstates = is_slm(family, model);
        do_knl_cstates  = is_knl(family, model);
 
+       if (debug)
+               decode_misc_pwr_mgmt_msr();
+
        rapl_probe(family, model);
        perf_limit_reasons_probe(family, model);