arm64: dts: Add SDHCI DT node for NS2
authorAnup Patel <anup.patel@broadcom.com>
Wed, 10 Feb 2016 06:10:47 +0000 (11:40 +0530)
committerFlorian Fainelli <f.fainelli@gmail.com>
Fri, 12 Feb 2016 23:47:29 +0000 (15:47 -0800)
The IPROC SDHCI driver works fine for SDIO 3.0 on NS2 so let's enable
it for NS2 SoC in NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm64/boot/dts/broadcom/ns2-svk.dts
arch/arm64/boot/dts/broadcom/ns2.dtsi

index 6bb3d4d9efa91cd534ed67c2196afdae49530699..3321bd1e0d7ac5146b4d9549c13edfdcdaba676e 100644 (file)
        status = "ok";
 };
 
+&sdio0 {
+       status = "ok";
+};
+
 &nand {
        nandcs@0 {
                compatible = "brcm,nandcs";
index a510d3a8e6473485af20bca9ec5d1eda4f98a846..b1f352d426f56b99730082133873d2444a0cd853 100644 (file)
                        reg = <0x66220000 0x28>;
                };
 
+               sdio0: sdhci@66420000 {
+                       compatible = "brcm,sdhci-iproc-cygnus";
+                       reg = <0x66420000 0x100>;
+                       interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
+                       bus-width = <8>;
+                       clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
+                       status = "disabled";
+               };
+
+               sdio1: sdhci@66430000 {
+                       compatible = "brcm,sdhci-iproc-cygnus";
+                       reg = <0x66430000 0x100>;
+                       interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
+                       bus-width = <8>;
+                       clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
+                       status = "disabled";
+               };
+
                nand: nand@66460000 {
                        compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
                        reg = <0x66460000 0x600>,