ARM: 7345/1: errata: update workaround for A9 erratum #743622
authorWill Deacon <will.deacon@arm.com>
Fri, 24 Feb 2012 11:12:38 +0000 (12:12 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 27 Feb 2012 11:22:08 +0000 (11:22 +0000)
Erratum #743622 affects all r2 variants of the Cortex-A9 processor, so
ensure that the workaround is applied regardless of the revision.

Cc: <stable@vger.kernel.org>
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/Kconfig
arch/arm/mm/proc-v7.S

index a48aecc17eacc2e3d3f5cf4b0ff4183f29b33440..dfb0312f4e73024f14eb0181bccf9e40870cbd3a 100644 (file)
@@ -1280,7 +1280,7 @@ config ARM_ERRATA_743622
        depends on CPU_V7
        help
          This option enables the workaround for the 743622 Cortex-A9
-         (r2p0..r2p2) erratum. Under very rare conditions, a faulty
+         (r2p*) erratum. Under very rare conditions, a faulty
          optimisation in the Cortex-A9 Store Buffer may lead to data
          corruption. This workaround sets a specific bit in the diagnostic
          register of the Cortex-A9 which disables the Store Buffer
index 0404ccbb8aa3ee39f0a8084c55879fb464115ca2..f1c8486f750169b0ffe8974b35e1b5555e53ad32 100644 (file)
@@ -230,9 +230,7 @@ __v7_setup:
        mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register
 #endif
 #ifdef CONFIG_ARM_ERRATA_743622
-       teq     r6, #0x20                       @ present in r2p0
-       teqne   r6, #0x21                       @ present in r2p1
-       teqne   r6, #0x22                       @ present in r2p2
+       teq     r5, #0x00200000                 @ only present in r2p*
        mrceq   p15, 0, r10, c15, c0, 1         @ read diagnostic register
        orreq   r10, r10, #1 << 6               @ set bit #6
        mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register