Sometimes it fails to wake up from suspend to RAM, this is because
we would flush the data cache by assemble command FLUSHINV before
suspend to RAM, and there is a delay between this command execution
and cache flush completion. Add a 1uS delay to works around this.
Signed-off-by: Aaron Wu <Aaron.wu@analog.com>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/irq.h>
+#include <linux/delay.h>
#include <asm/cplb.h>
#include <asm/gpio.h>
#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
flushinv_all_dcache();
+ udelay(1);
#endif
_disable_dcplb();
_disable_icplb();