These three platforms didn't properly fill nr_chips in gen_nand
registration and therefore depended on gen_nand bug fixed by commit
81cbb0b17796d81cbd92defe113cf2a7c7a21fbb ("mtd: gen_nand: fix support for
multiple chips")
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
static struct platform_nand_data ixdp425_flash_nand_data = {
.chip = {
+ .nr_chips = 1,
.chip_delay = 30,
.options = NAND_NO_AUTOINCR,
#ifdef CONFIG_MTD_PARTITIONS
static struct platform_nand_data qong_nand_data = {
.chip = {
+ .nr_chips = 1,
.chip_delay = 20,
.options = 0,
},
static struct platform_nand_data ts78xx_ts_nand_data = {
.chip = {
+ .nr_chips = 1,
.part_probe_types = ts_nand_part_probes,
.partitions = ts78xx_ts_nand_parts,
.nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts),