KVM: SVM: Allow EFER.LMSLE to be set with nested svm

This patch enables setting of efer bit 13 which is allowed
in all SVM capable processors. This is necessary for the
SLES11 version of Xen 4.0 to boot with nested svm.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@redhat.com>

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 8c7ae4318629445f16b588e9535b0dc2a105836c..509a42187dc25db56aaabd5bcb5652235ec27e8c 100644 (file)
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -20,6 +20,7 @@
 #define _EFER_LMA              10 /* Long mode active (read-only) */
 #define _EFER_NX               11 /* No execute enable */
 #define _EFER_SVME             12 /* Enable virtualization */
+#define _EFER_LMSLE            13 /* Long Mode Segment Limit Enable */
 #define _EFER_FFXSR            14 /* Enable Fast FXSAVE/FXRSTOR */
 
 #define EFER_SCE               (1<<_EFER_SCE)
@@ -27,6 +28,7 @@
 #define EFER_LMA               (1<<_EFER_LMA)
 #define EFER_NX                        (1<<_EFER_NX)
 #define EFER_SVME              (1<<_EFER_SVME)
+#define EFER_LMSLE             (1<<_EFER_LMSLE)
 #define EFER_FFXSR             (1<<_EFER_FFXSR)
 
 /* Intel MSRs. Some also available on other CPUs */

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 685cffff01f321dba638476b84594f4e93981099..41fe0381a1ae55cb96f221106a444287121c7df2 100644 (file)
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -640,7 +640,7 @@ static __init int svm_hardware_setup(void)
 
        if (nested) {
                printk(KERN_INFO "kvm: Nested Virtualization enabled\n");
-               kvm_enable_efer_bits(EFER_SVME);
+               kvm_enable_efer_bits(EFER_SVME | EFER_LMSLE);
        }
 
        for_each_possible_cpu(cpu) {