powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000

By default, TASK_SIZE is set to 0x80000000 for PPC_8xx, which is most
likely sufficient for most cases. However, kernel configuration allows
to set TASK_SIZE to another value, so the 8xx shall handle it.

This patch also takes into account the case of PAGE_OFFSET lower than
0x80000000, allthought most of the time it is equal to 0xC0000000

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <scottwood@freescale.com>

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index ba2dc53cd5a149cbbc3f876675c67d7638da2797..c640bbb042b5ce02c695de52b9955a3d615e1fa6 100644 (file)
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -48,6 +48,19 @@
        mtspr   spr, reg
 #endif
 
+/* Macro to test if an address is a kernel address */
+#if CONFIG_TASK_SIZE <= 0x80000000 && CONFIG_PAGE_OFFSET >= 0x80000000
+#define IS_KERNEL(tmp, addr)           \
+       andis.  tmp, addr, 0x8000       /* Address >= 0x80000000 */
+#define BRANCH_UNLESS_KERNEL(label)    beq     label
+#else
+#define IS_KERNEL(tmp, addr)           \
+       rlwinm  tmp, addr, 16, 16, 31;  \
+       cmpli   cr0, tmp, PAGE_OFFSET >> 16
+#define BRANCH_UNLESS_KERNEL(label)    blt     label
+#endif
+
+
 /*
  * Value for the bits that have fixed value in RPN entries.
  * Also used for tagging DAR for DTLBerror.
@@ -322,9 +335,9 @@ InstructionTLBMiss:
        mfspr   r11, SPRN_SRR0  /* Get effective address of fault */
        INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)
        mfcr    r10
-       andis.  r11, r11, 0x8000        /* Address >= 0x80000000 */
+       IS_KERNEL(r11, r11)
        mfspr   r11, SPRN_M_TW  /* Get level 1 table */
-       beq     3f
+       BRANCH_UNLESS_KERNEL(3f)
        lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
        mtcr    r10
@@ -379,9 +392,9 @@ DataStoreTLBMiss:
         * kernel page tables.
         */
        mfspr   r11, SPRN_MD_EPN
-       andis.  r11, r11, 0x8000
+       IS_KERNEL(r11, r11)
        mfspr   r11, SPRN_M_TW  /* Get level 1 table */
-       beq     3f
+       BRANCH_UNLESS_KERNEL(3f)
        lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
        mtcr    r10
@@ -513,9 +526,9 @@ FixupDAR:/* Entry point for dcbx workaround. */
        mtspr   SPRN_SPRG_SCRATCH2, r10
        /* fetch instruction from memory. */
        mfspr   r10, SPRN_SRR0
-       andis.  r11, r10, 0x8000        /* Address >= 0x80000000 */
+       IS_KERNEL(r11, r10)
        mfspr   r11, SPRN_M_TW  /* Get level 1 table */
-       beq     3f
+       BRANCH_UNLESS_KERNEL(3f)
        lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
        /* Insert level 1 index */
 3:     rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29