cx25840_write4(client, 0x414, 0x00107d12);
/* Chroma */
- cx25840_write4(client, 0x420, 0x3d008282);
+ if (is_cx23888(state))
+ cx25840_write4(client, 0x418, 0x1d008282);
+ else
+ cx25840_write4(client, 0x420, 0x3d008282);
/*
* Aux PLL
cx25840_write4(client, 0x130, 0x0);
/* Undocumented */
- cx25840_write4(client, 0x478, 0x6628021F);
+ if (is_cx23888(state))
+ cx25840_write4(client, 0x454, 0x6628021F);
+ else
+ cx25840_write4(client, 0x478, 0x6628021F);
/* AFE_CLK_OUT_CTRL - Select the clock output source as output */
cx25840_write4(client, 0x144, 0x5);
cx25840_write4(client, 0x410, 0xffff0dbf);
cx25840_write4(client, 0x414, 0x00137d03);
- /* on the 887, 0x418 is HSCALE_CTRL, on the 888 it is
- CHROMA_CTRL */
- if (is_cx23888(state))
- cx25840_write4(client, 0x418, 0x01008080);
- else
- cx25840_write4(client, 0x418, 0x01000000);
-
- cx25840_write4(client, 0x41c, 0x00000000);
-
- /* on the 887, 0x420 is CHROMA_CTRL, on the 888 it is
- CRUSH_CTRL */
- if (is_cx23888(state))
- cx25840_write4(client, 0x420, 0x001c3e0f);
- else
- cx25840_write4(client, 0x420, 0x001c8282);
-
cx25840_write4(client, state->vbi_regs_offset + 0x42c, 0x42600000);
cx25840_write4(client, state->vbi_regs_offset + 0x430, 0x0000039b);
cx25840_write4(client, state->vbi_regs_offset + 0x438, 0x00000000);
+
cx25840_write4(client, state->vbi_regs_offset + 0x440, 0xF8E3E824);
cx25840_write4(client, state->vbi_regs_offset + 0x444, 0x401040dc);
cx25840_write4(client, state->vbi_regs_offset + 0x448, 0xcd3f02a0);
fmt->width, fmt->height, HSC, VSC);
/* HSCALE=HSC */
- cx25840_write(client, 0x418, HSC & 0xff);
- cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
- cx25840_write(client, 0x41a, HSC >> 16);
- /* VSCALE=VSC */
- cx25840_write(client, 0x41c, VSC & 0xff);
- cx25840_write(client, 0x41d, VSC >> 8);
- /* VS_INTRLACE=1 VFILT=filter */
- cx25840_write(client, 0x41e, 0x8 | filter);
+ if (is_cx23888(state)) {
+ cx25840_write4(client, 0x434, HSC | (1 << 24));
+ /* VSCALE=VSC VS_INTRLACE=1 VFILT=filter */
+ cx25840_write4(client, 0x438, VSC | (1 << 19) | (filter << 16));
+ } else {
+ cx25840_write(client, 0x418, HSC & 0xff);
+ cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
+ cx25840_write(client, 0x41a, HSC >> 16);
+ /* VSCALE=VSC */
+ cx25840_write(client, 0x41c, VSC & 0xff);
+ cx25840_write(client, 0x41d, VSC >> 8);
+ /* VS_INTRLACE=1 VFILT=filter */
+ cx25840_write(client, 0x41e, 0x8 | filter);
+ }
return 0;
}