ahci-platform: Bump max number of clocks to 5
authorKumar Gala <galak@codeaurora.org>
Mon, 22 Sep 2014 20:09:45 +0000 (15:09 -0500)
committerTejun Heo <tj@kernel.org>
Tue, 23 Sep 2014 13:16:56 +0000 (09:16 -0400)
Qualcomm IPQ806x SoCs with SATA controllers need 5 clocks to be enabled.

Signed-off-by: Kumar Gala <galak@codeaurora.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
drivers/ata/ahci.h

index 59ae0ee001491ea7f9b8c1bdd61cb305e0cd648c..90156ff1e9cbf95eff0cb6dfda152decee56a697 100644 (file)
@@ -53,7 +53,7 @@
 
 enum {
        AHCI_MAX_PORTS          = 32,
-       AHCI_MAX_CLKS           = 4,
+       AHCI_MAX_CLKS           = 5,
        AHCI_MAX_SG             = 168, /* hardware max is 64K */
        AHCI_DMA_BOUNDARY       = 0xffffffff,
        AHCI_MAX_CMDS           = 32,