UPSTREAM: arm64: Allow hw watchpoint of length 3,5,6 and 7
authorPratyush Anand <panand@redhat.com>
Mon, 14 Nov 2016 14:02:45 +0000 (19:32 +0530)
committerPavel Labath <labath@google.com>
Fri, 3 Feb 2017 17:43:54 +0000 (17:43 +0000)
(cherry picked from commit 0ddb8e0b784ba034f3096d5a54684d0d73155e2a)

Since, arm64 can support all offset within a double word limit. Therefore,
now support other lengths within that range as well.

Signed-off-by: Pratyush Anand <panand@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Pavel Labath <labath@google.com>
Change-Id: Ibcb263a3903572336ccbf96e0180d3990326545a
Bug: 30919905

arch/arm64/include/asm/hw_breakpoint.h
arch/arm64/kernel/hw_breakpoint.c

index 8acfd989a4e42d18ba359aa0a510bb27ee215023..c72b8e201ab4f2b028b7cdc0ff701b6f18f782e4 100644 (file)
@@ -68,7 +68,11 @@ static inline void decode_ctrl_reg(u32 reg,
 /* Lengths */
 #define ARM_BREAKPOINT_LEN_1   0x1
 #define ARM_BREAKPOINT_LEN_2   0x3
+#define ARM_BREAKPOINT_LEN_3   0x7
 #define ARM_BREAKPOINT_LEN_4   0xf
+#define ARM_BREAKPOINT_LEN_5   0x1f
+#define ARM_BREAKPOINT_LEN_6   0x3f
+#define ARM_BREAKPOINT_LEN_7   0x7f
 #define ARM_BREAKPOINT_LEN_8   0xff
 
 /* Kernel stepping */
index 6e02c8e4a8d06c769fe48dac47f080c324f90acf..2d2792a714add86f9c068da51521af5b16745847 100644 (file)
@@ -313,9 +313,21 @@ static int get_hbp_len(u8 hbp_len)
        case ARM_BREAKPOINT_LEN_2:
                len_in_bytes = 2;
                break;
+       case ARM_BREAKPOINT_LEN_3:
+               len_in_bytes = 3;
+               break;
        case ARM_BREAKPOINT_LEN_4:
                len_in_bytes = 4;
                break;
+       case ARM_BREAKPOINT_LEN_5:
+               len_in_bytes = 5;
+               break;
+       case ARM_BREAKPOINT_LEN_6:
+               len_in_bytes = 6;
+               break;
+       case ARM_BREAKPOINT_LEN_7:
+               len_in_bytes = 7;
+               break;
        case ARM_BREAKPOINT_LEN_8:
                len_in_bytes = 8;
                break;
@@ -377,9 +389,21 @@ int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl,
        case ARM_BREAKPOINT_LEN_2:
                *gen_len = HW_BREAKPOINT_LEN_2;
                break;
+       case ARM_BREAKPOINT_LEN_3:
+               *gen_len = HW_BREAKPOINT_LEN_3;
+               break;
        case ARM_BREAKPOINT_LEN_4:
                *gen_len = HW_BREAKPOINT_LEN_4;
                break;
+       case ARM_BREAKPOINT_LEN_5:
+               *gen_len = HW_BREAKPOINT_LEN_5;
+               break;
+       case ARM_BREAKPOINT_LEN_6:
+               *gen_len = HW_BREAKPOINT_LEN_6;
+               break;
+       case ARM_BREAKPOINT_LEN_7:
+               *gen_len = HW_BREAKPOINT_LEN_7;
+               break;
        case ARM_BREAKPOINT_LEN_8:
                *gen_len = HW_BREAKPOINT_LEN_8;
                break;
@@ -423,9 +447,21 @@ static int arch_build_bp_info(struct perf_event *bp)
        case HW_BREAKPOINT_LEN_2:
                info->ctrl.len = ARM_BREAKPOINT_LEN_2;
                break;
+       case HW_BREAKPOINT_LEN_3:
+               info->ctrl.len = ARM_BREAKPOINT_LEN_3;
+               break;
        case HW_BREAKPOINT_LEN_4:
                info->ctrl.len = ARM_BREAKPOINT_LEN_4;
                break;
+       case HW_BREAKPOINT_LEN_5:
+               info->ctrl.len = ARM_BREAKPOINT_LEN_5;
+               break;
+       case HW_BREAKPOINT_LEN_6:
+               info->ctrl.len = ARM_BREAKPOINT_LEN_6;
+               break;
+       case HW_BREAKPOINT_LEN_7:
+               info->ctrl.len = ARM_BREAKPOINT_LEN_7;
+               break;
        case HW_BREAKPOINT_LEN_8:
                info->ctrl.len = ARM_BREAKPOINT_LEN_8;
                break;