/* Extended address registers */
0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Status, data regs */
- 0x00, 0x83, 0x00, 0x40, 0x80, 0x00,
+ 0x00, 0x83, 0x00, 0x40, 0x80, 0xC0, 0x00,
};
/*
case UDA134X_DATA000:
case UDA134X_DATA001:
case UDA134X_DATA010:
+ case UDA134X_DATA011:
addr = UDA134X_DATA0_ADDR;
break;
case UDA134X_DATA1:
#define UDA134X_DATA000 10
#define UDA134X_DATA001 11
#define UDA134X_DATA010 12
-#define UDA134X_DATA1 13
+#define UDA134X_DATA011 13
+#define UDA134X_DATA1 14
-#define UDA134X_REGS_NUM 14
+#define UDA134X_REGS_NUM 15
#define STATUS0_DAIFMT_MASK (~(7<<1))
#define STATUS0_SYSCLK_MASK (~(3<<4))