} else if (ring == &adev->vce.ring[0] ||
ring == &adev->vce.ring[1]) {
+ struct fence *f = NULL;
r = amdgpu_vce_get_create_msg(ring, handle, NULL);
if (r) {
DRM_ERROR("Failed to get dummy create msg\n");
return r;
}
- r = amdgpu_vce_get_destroy_msg(ring, handle, fence);
+ r = amdgpu_vce_get_destroy_msg(ring, handle, &f);
if (r) {
DRM_ERROR("Failed to get dummy destroy msg\n");
return r;
}
-
+ *fence = to_amdgpu_fence(f);
} else {
r = amdgpu_ring_lock(ring, 64);
if (r) {
* Open up a stream for HW test
*/
int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
- struct amdgpu_fence **fence)
+ struct fence **fence)
{
const unsigned ib_size_dw = 1024;
struct amdgpu_ib *ib = NULL;
if (r)
goto err;
if (fence)
- *fence = amdgpu_fence_ref(ib->fence);
+ *fence = fence_get(&ib->fence->base);
if (amdgpu_enable_scheduler)
return 0;
err:
* Close up a stream for HW test or if userspace failed to do so
*/
int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
- struct amdgpu_fence **fence)
+ struct fence **fence)
{
const unsigned ib_size_dw = 1024;
struct amdgpu_ib *ib = NULL;
if (r)
goto err;
if (fence)
- *fence = amdgpu_fence_ref(ib->fence);
+ *fence = fence_get(&ib->fence->base);
if (amdgpu_enable_scheduler)
return 0;
err:
*/
int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring)
{
- struct amdgpu_fence *fence = NULL;
+ struct fence *fence = NULL;
int r;
r = amdgpu_vce_get_create_msg(ring, 1, NULL);
goto error;
}
- r = amdgpu_fence_wait(fence, false);
+ r = fence_wait(fence, false);
if (r) {
DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
} else {
DRM_INFO("ib test on ring %d succeeded\n", ring->idx);
}
error:
- amdgpu_fence_unref(&fence);
+ fence_put(fence);
return r;
}
int amdgpu_vce_suspend(struct amdgpu_device *adev);
int amdgpu_vce_resume(struct amdgpu_device *adev);
int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
- struct amdgpu_fence **fence);
+ struct fence **fence);
int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
- struct amdgpu_fence **fence);
+ struct fence **fence);
void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
bool amdgpu_vce_ring_emit_semaphore(struct amdgpu_ring *ring,