ARM: dts: rockchip: add soc-specific uart compatibles for rk3066/rk3188

The serial IPs in Rockchip socs are based on Designware uarts and thus
bind against the snps,dw-apb-uart compatible.
On all newer socs we also carry around per-soc compatibles that allow
us to have more specific drivers in the future - if needed.

The cortex-a9 socs rk3066 and rk3188 that were added first don't have
those yet, so add them for completenes sake.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index e498c362b9e708daa96460bc7b5147bb21808c9c..f50481fd8e5cdc5de9e05a035fb75d2b2bd8bbaf 100644 (file)
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -687,6 +687,7 @@
 };
 
 &uart0 {
+       compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
        dmas = <&dmac1_s 0>, <&dmac1_s 1>;
        dma-names = "tx", "rx";
        pinctrl-names = "default";
@@ -694,6 +695,7 @@
 };
 
 &uart1 {
+       compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
        dmas = <&dmac1_s 2>, <&dmac1_s 3>;
        dma-names = "tx", "rx";
        pinctrl-names = "default";
@@ -701,6 +703,7 @@
 };
 
 &uart2 {
+       compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
        dmas = <&dmac2 6>, <&dmac2 7>;
        dma-names = "tx", "rx";
        pinctrl-names = "default";
@@ -708,6 +711,7 @@
 };
 
 &uart3 {
+       compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
        dmas = <&dmac2 8>, <&dmac2 9>;
        dma-names = "tx", "rx";
        pinctrl-names = "default";

diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 869e189331ec4624c1ba45a4c6a53ce58504dd69..cf91254d0a432aa39e73b16b0339a772a35277f5 100644 (file)
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -599,21 +599,25 @@
 };
 
 &uart0 {
+       compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_xfer>;
 };
 
 &uart1 {
+       compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
        pinctrl-names = "default";
        pinctrl-0 = <&uart1_xfer>;
 };
 
 &uart2 {
+       compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
        pinctrl-names = "default";
        pinctrl-0 = <&uart2_xfer>;
 };
 
 &uart3 {
+       compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
        pinctrl-names = "default";
        pinctrl-0 = <&uart3_xfer>;
 };