i2c: designware-pci: clarify a comment for Merrifield

There are more than 7 busses, but only 7 are user visible. Update comment
accordingly.

Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>

diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index b66c31acb1843c8bd876bc44aeb1cba27dae6f36..96f8230cd2d3352fa52678bc4be9f6e2f39d397f 100644 (file)
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -125,10 +125,10 @@ static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
 {
        /*
-        * On Intel Merrifield the i2c busses are enumerated [1..7]. So, we add
-        * 1 to shift the default range. Besides that the first PCI slot
-        * provides 4 functions, that's why we have to add 0 to the head slot
-        * and 4 to the tail one.
+        * On Intel Merrifield the user visible i2c busses are enumerated
+        * [1..7]. So, we add 1 to shift the default range. Besides that the
+        * first PCI slot provides 4 functions, that's why we have to add 0 to
+        * the first slot and 4 to the next one.
         */
        switch (PCI_SLOT(pdev->devfn)) {
        case 8: