mtd: OneNAND: S5PC110: Add timeout to prevent the endless loop
authorKyungmin Park <kyungmin.park@samsung.com>
Mon, 27 Sep 2010 07:25:17 +0000 (16:25 +0900)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Sun, 24 Oct 2010 23:50:09 +0000 (00:50 +0100)
There's no case timeout but add it for some H/W problem or
wrong codes implementation

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/onenand/samsung.c

index 7913a921b08b80f475b08253af72481022c5c4e6..b80128036a28a11f3cd44888e896d4b2339d33e3 100644 (file)
@@ -535,6 +535,7 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 {
        void __iomem *base = onenand->dma_addr;
        int status;
+       unsigned long timeout;
 
        writel(src, base + S5PC110_DMA_SRC_ADDR);
        writel(dst, base + S5PC110_DMA_DST_ADDR);
@@ -552,6 +553,13 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 
        writel(S5PC110_DMA_TRANS_CMD_TR, base + S5PC110_DMA_TRANS_CMD);
 
+       /*
+        * There's no exact timeout values at Spec.
+        * In real case it takes under 1 msec.
+        * So 20 msecs are enough.
+        */
+       timeout = jiffies + msecs_to_jiffies(20);
+
        do {
                status = readl(base + S5PC110_DMA_TRANS_STATUS);
                if (status & S5PC110_DMA_TRANS_STATUS_TE) {
@@ -559,7 +567,8 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
                                        base + S5PC110_DMA_TRANS_CMD);
                        return -EIO;
                }
-       } while (!(status & S5PC110_DMA_TRANS_STATUS_TD));
+       } while (!(status & S5PC110_DMA_TRANS_STATUS_TD) &&
+               time_before(jiffies, timeout));
 
        writel(S5PC110_DMA_TRANS_CMD_TDC, base + S5PC110_DMA_TRANS_CMD);