The hardware level /CS handling is tied to the start of the data path so
is rolled into the same function as we use to manipulate GPIO /CS. In
order to support factoring out the /CS handling into the core separate the
two and explicitly start transfers separately to the /CS handling.
Signed-off-by: Mark Brown <broonie@linaro.org>
/* Start the signals */
writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
+ /* Start the signals */
+ writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
+
spin_unlock_irqrestore(&sdd->lock, flags);
status = wait_for_xfer(sdd, xfer, use_dma);