return 1;
}
-static int xsurf_ack_intr(ide_hwif_t *hwif)
+static void xsurf_clear_irq(ide_drive_t *drive)
{
- unsigned char ch;
-
- ch = z_readb(hwif->io_ports.irq_addr);
- /* X-Surf needs a 0 written to IRQ register to ensure ISA bit A11 stays at 0 */
- z_writeb(0, hwif->io_ports.irq_addr);
- if (!(ch & 0x80))
- return 0;
- return 1;
+ /*
+ * X-Surf needs 0 written to IRQ register to ensure ISA bit A11 stays at 0
+ */
+ z_writeb(0, drive->hwif->io_ports.irq_addr);
}
static void __init buddha_setup_ports(struct ide_hw *hw, unsigned long base,
hw->ack_intr = ack_intr;
}
+static const struct ide_port_ops xsurf_port_ops = {
+ .clear_irq = xsurf_clear_irq,
+};
+
static const struct ide_port_info buddha_port_info = {
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA,
.irq_flags = IRQF_SHARED,
while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
unsigned long board;
struct ide_hw hw[MAX_NUM_HWIFS], *hws[MAX_NUM_HWIFS];
+ struct ide_port_info d = buddha_port_info;
if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_BUDDHA) {
buddha_num_hwifs = BUDDHA_NUM_HWIFS;
} else if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF) {
buddha_num_hwifs = XSURF_NUM_HWIFS;
type=BOARD_XSURF;
+ d.port_ops = &xsurf_port_ops;
} else
continue;
for (i = 0; i < buddha_num_hwifs; i++) {
unsigned long base, ctl, irq_port;
- ide_ack_intr_t *ack_intr;
if (type != BOARD_XSURF) {
base = buddha_board + buddha_bases[i];
ctl = base + BUDDHA_CONTROL;
irq_port = buddha_board + buddha_irqports[i];
- ack_intr = buddha_ack_intr;
} else {
base = buddha_board + xsurf_bases[i];
/* X-Surf has no CS1* (Control/AltStat) */
ctl = 0;
irq_port = buddha_board + xsurf_irqports[i];
- ack_intr = xsurf_ack_intr;
}
buddha_setup_ports(&hw[i], base, ctl, irq_port,
- ack_intr);
+ buddha_ack_intr);
hws[i] = &hw[i];
}
- ide_host_add(&buddha_port_info, hws, i, NULL);
+ ide_host_add(&d, hws, i, NULL);
}
return 0;
* Check and acknowledge the interrupt status
*/
-static int gayle_ack_intr_a4000(ide_hwif_t *hwif)
+static int gayle_ack_intr(ide_hwif_t *hwif)
{
unsigned char ch;
return 1;
}
-static int gayle_ack_intr_a1200(ide_hwif_t *hwif)
+static void gayle_a1200_clear_irq(ide_drive_t *drive)
{
- unsigned char ch;
+ ide_hwif_t *hwif = drive->hwif;
- ch = z_readb(hwif->io_ports.irq_addr);
- if (!(ch & GAYLE_IRQ_IDE))
- return 0;
(void)z_readb(hwif->io_ports.status_addr);
z_writeb(0x7c, hwif->io_ports.irq_addr);
- return 1;
}
static void __init gayle_setup_ports(struct ide_hw *hw, unsigned long base,
hw->ack_intr = ack_intr;
}
+static const struct ide_port_ops gayle_a1200_port_ops = {
+ .clear_irq = gayle_a1200_clear_irq,
+};
+
static const struct ide_port_info gayle_port_info = {
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_SERIALIZE |
IDE_HFLAG_NO_DMA,
{
unsigned long phys_base, res_start, res_n;
unsigned long base, ctrlport, irqport;
- ide_ack_intr_t *ack_intr;
int a4000, i, rc;
struct ide_hw hw[GAYLE_NUM_HWIFS], *hws[GAYLE_NUM_HWIFS];
+ struct ide_port_info d = gayle_port_info;
if (!MACH_IS_AMIGA)
return -ENODEV;
if (a4000) {
phys_base = GAYLE_BASE_4000;
irqport = (unsigned long)ZTWO_VADDR(GAYLE_IRQ_4000);
- ack_intr = gayle_ack_intr_a4000;
} else {
phys_base = GAYLE_BASE_1200;
irqport = (unsigned long)ZTWO_VADDR(GAYLE_IRQ_1200);
- ack_intr = gayle_ack_intr_a1200;
+ d.port_ops = &gayle_a1200_port_ops;
}
res_start = ((unsigned long)phys_base) & ~(GAYLE_NEXT_PORT-1);
base = (unsigned long)ZTWO_VADDR(phys_base + i * GAYLE_NEXT_PORT);
ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0;
- gayle_setup_ports(&hw[i], base, ctrlport, irqport, ack_intr);
+ gayle_setup_ports(&hw[i], base, ctrlport, irqport, gayle_ack_intr);
hws[i] = &hw[i];
}
- rc = ide_host_add(&gayle_port_info, hws, i, NULL);
+ rc = ide_host_add(&d, hws, i, NULL);
if (rc)
release_mem_region(res_start, res_n);
} else if (drive_is_ready(drive)) {
if (drive->waiting_for_dma)
hwif->dma_ops->dma_lost_irq(drive);
- if (hwif->ack_intr)
- hwif->ack_intr(hwif);
if (hwif->port_ops && hwif->port_ops->clear_irq)
hwif->port_ops->clear_irq(drive);
int macide_ack_intr(ide_hwif_t* hwif)
{
- if (*ide_ifr & 0x20) {
- *ide_ifr &= ~0x20;
+ if (*ide_ifr & 0x20)
return 1;
- }
return 0;
}
+static void macide_clear_irq(ide_drive_t *drive)
+{
+ *ide_ifr &= ~0x20;
+}
+
static void __init macide_setup_ports(struct ide_hw *hw, unsigned long base,
int irq, ide_ack_intr_t *ack_intr)
{
hw->ack_intr = ack_intr;
}
+static const struct ide_port_ops macide_port_ops = {
+ .clear_irq = macide_clear_irq,
+};
+
static const struct ide_port_info macide_port_info = {
+ .port_ops = &macide_port_ops,
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA,
.irq_flags = IRQF_SHARED,
.chipset = ide_generic,
unsigned long base;
int irq;
struct ide_hw hw, *hws[] = { &hw };
+ struct ide_port_info d = macide_port_info;
if (!MACH_IS_MAC)
return -ENODEV;
case MAC_IDE_BABOON:
base = BABOON_BASE;
ack_intr = NULL;
+ d.port_ops = NULL;
irq = IRQ_BABOON_1;
break;
default:
macide_setup_ports(&hw, base, irq, ack_intr);
- return ide_host_add(&macide_port_info, hws, 1, NULL);
+ return ide_host_add(&d, hws, 1, NULL);
}
module_init(macide_init);