drm/i915: Report IOMMU enabled status for GPU hangs
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 7 Aug 2015 19:24:15 +0000 (20:24 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Aug 2015 15:50:41 +0000 (17:50 +0200)
The IOMMU for Intel graphics has historically had many issues resulting
in random GPU hangs. Lets include its status when capturing the GPU hang
error state for post-mortem analysis.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gpu_error.c

index a8ac36dbf24b680e5a944abe904f78f5bb98602b..5283db90477cbdff59d13ef31c6335946fded9d9 100644 (file)
@@ -484,6 +484,7 @@ struct drm_i915_error_state {
        struct timeval time;
 
        char error_msg[128];
+       int iommu;
        u32 reset_count;
        u32 suspend_count;
 
index 6f4256918f7694804f992cd2466db250d7490ad0..41d0739e6fdfa9474a21b63b754c9000a7b33421 100644 (file)
@@ -369,6 +369,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
        err_printf(m, "Reset count: %u\n", error->reset_count);
        err_printf(m, "Suspend count: %u\n", error->suspend_count);
        err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
+       err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
        err_printf(m, "EIR: 0x%08x\n", error->eir);
        err_printf(m, "IER: 0x%08x\n", error->ier);
        if (INTEL_INFO(dev)->gen >= 8) {
@@ -1266,6 +1267,10 @@ static void i915_error_capture_msg(struct drm_device *dev,
 static void i915_capture_gen_state(struct drm_i915_private *dev_priv,
                                   struct drm_i915_error_state *error)
 {
+       error->iommu = -1;
+#ifdef CONFIG_INTEL_IOMMU
+       error->iommu = intel_iommu_gfx_mapped;
+#endif
        error->reset_count = i915_reset_count(&dev_priv->gpu_error);
        error->suspend_count = dev_priv->suspend_count;
 }