ARC: ensure futex ops are atomic in !LLSC config

W/o hardware assisted atomic r-m-w the best we can do is to disable
preemption.

Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michel Lespinasse <walken@google.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

diff --git a/arch/arc/include/asm/futex.h b/arch/arc/include/asm/futex.h
index 0ea8bcc7b846a7eaf4e5176a4bbf8adda6b7547b..8f449982523bb04cf8f035d59005b863a14fa0ba 100644 (file)
--- a/arch/arc/include/asm/futex.h
+++ b/arch/arc/include/asm/futex.h
@@ -87,6 +87,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
                return -EFAULT;
 
+#ifndef CONFIG_ARC_HAS_LLSC
+       preempt_disable();      /* to guarantee atomic r-m-w of futex op */
+#endif
        pagefault_disable();
 
        switch (op) {
@@ -111,6 +114,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
        }
 
        pagefault_enable();
+#ifndef CONFIG_ARC_HAS_LLSC
+       preempt_enable();
+#endif
 
        if (!ret) {
                switch (cmp) {
@@ -153,6 +159,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval,
        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
                return -EFAULT;
 
+#ifndef CONFIG_ARC_HAS_LLSC
+       preempt_disable();      /* to guarantee atomic r-m-w of futex op */
+#endif
        smp_mb();
 
        __asm__ __volatile__(
@@ -182,6 +191,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval,
 
        smp_mb();
 
+#ifndef CONFIG_ARC_HAS_LLSC
+       preempt_enable();
+#endif
        *uval = existval;
        return ret;
 }