ARM: dts: rockchip: add watchdog node

This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index 8b479f7675615d77d8e69b1c5795c64565d24486..042f821d9e4d8bdbe0ab48722293278a86a44496 100644 (file)
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -188,3 +188,7 @@
 &uart3 {
        status = "okay";
 };
+
+&wdt {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 9c34da4d8aad124e8117ec129642683c477fc126..879a818fba51797062b4f5e7cbca58dc14b4a863 100644 (file)
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -425,3 +425,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&uart3_xfer>;
 };
+
+&wdt {
+       compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
+};

diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index 4195f5a99e63ddd9ce6b04fe94bdc75c528c8183..171b610db709f9e4f94355c31d54d858d89a84c2 100644 (file)
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -221,3 +221,7 @@
 &uart3 {
        status = "okay";
 };
+
+&wdt {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 27215e0b5c3b5d21f2595a8c4f8d44f78d291240..ee801a9c6b74144e4a8153908a5e1ad07365bfef 100644 (file)
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -400,3 +400,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&uart3_xfer>;
 };
+
+&wdt {
+       compatible = "rockchip,rk3188-wdt", "snps,dw-wdt";
+};

diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index c6f05610ed2d231478d6f913463d60251cc0d44b..8caf85d839019ab1ed47690cf9bb4597de71b2f2 100644 (file)
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -174,6 +174,14 @@
                status = "disabled";
        };
 
+       wdt: watchdog@2004c000 {
+               compatible = "snps,dw-wdt";
+               reg = <0x2004c000 0x100>;
+               clocks = <&cru PCLK_WDT>;
+               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+       };
+
        pwm2: pwm@20050020 {
                compatible = "rockchip,rk2928-pwm";
                reg = <0x20050020 0x10>;