b43: HT-PHY: read clip state

We don't know yet when to restore it, implement just reading. We found
out what for are that PHY ops by comparing HT with N code.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/b43/phy_ht.c b/drivers/net/wireless/b43/phy_ht.c
index c0e436c168669946a01823d769d30707de6c7e5d..4d6345e8ee6bb7fc4aca143610ab23939da5e5e1 100644 (file)
--- a/drivers/net/wireless/b43/phy_ht.c
+++ b/drivers/net/wireless/b43/phy_ht.c
@@ -212,6 +212,13 @@ static void b43_phy_ht_force_rf_sequence(struct b43_wldev *dev, u16 rf_seq)
        b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);
 }
 
+static void b43_phy_ht_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
+{
+       clip_st[0] = b43_phy_read(dev, B43_PHY_HT_C1_CLIP1THRES);
+       clip_st[1] = b43_phy_read(dev, B43_PHY_HT_C2_CLIP1THRES);
+       clip_st[2] = b43_phy_read(dev, B43_PHY_HT_C3_CLIP1THRES);
+}
+
 static void b43_phy_ht_bphy_init(struct b43_wldev *dev)
 {
        unsigned int i;
@@ -335,6 +342,7 @@ static void b43_phy_ht_op_prepare_structs(struct b43_wldev *dev)
 static int b43_phy_ht_op_init(struct b43_wldev *dev)
 {
        u16 tmp;
+       u16 clip_state[3];
 
        b43_phy_ht_tables_init(dev);
 
@@ -443,7 +451,8 @@ static int b43_phy_ht_op_init(struct b43_wldev *dev)
 
        /* TODO: PHY op on reg 0xb0 */
 
-       /* TODO: PHY ops on regs 0x40e, 0x44e, 0x48e */
+       /* TODO: Should we restore it? Or store it in global PHY info? */
+       b43_phy_ht_read_clip_detection(dev, clip_state);
 
        if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
                b43_phy_ht_bphy_init(dev);

diff --git a/drivers/net/wireless/b43/phy_ht.h b/drivers/net/wireless/b43/phy_ht.h
index 0661ae2661016913d1a60dd17f478e8bd5938e6c..6544c4293b34ddc0f3980041d7f29ce547fb5212 100644 (file)
--- a/drivers/net/wireless/b43/phy_ht.h
+++ b/drivers/net/wireless/b43/phy_ht.h
@@ -19,6 +19,10 @@
 #define B43_PHY_HT_BW5                         0x1D2
 #define B43_PHY_HT_BW6                         0x1D3
 
+#define B43_PHY_HT_C1_CLIP1THRES               B43_PHY_OFDM(0x00E)
+#define B43_PHY_HT_C2_CLIP1THRES               B43_PHY_OFDM(0x04E)
+#define B43_PHY_HT_C3_CLIP1THRES               B43_PHY_OFDM(0x08E)
+
 #define B43_PHY_HT_RF_SEQ_MODE                 B43_PHY_EXTG(0x000)
 #define B43_PHY_HT_RF_SEQ_TRIG                 B43_PHY_EXTG(0x003)
 #define  B43_PHY_HT_RF_SEQ_TRIG_RX2TX          0x0001 /* RX2TX */