drm/bridge/sii8620: add reading device capability registers
authorAndrzej Hajda <a.hajda@samsung.com>
Wed, 1 Feb 2017 07:47:30 +0000 (08:47 +0100)
committerArchit Taneja <architt@codeaurora.org>
Thu, 2 Feb 2017 09:45:22 +0000 (15:15 +0530)
This functionality is necessary to implement MHL3 modes.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-4-git-send-email-a.hajda@samsung.com
drivers/gpu/drm/bridge/sil-sii8620.c

index 50af78f07d9c0e2c550fa6527408040026c0bfad..75867c0735de0d1a576b8c3a297f961d3ad29b9f 100644 (file)
@@ -286,6 +286,12 @@ static void sii8620_mt_msc_cmd_send(struct sii8620 *ctx,
                sii8620_write(ctx, REG_MSC_COMMAND_START,
                              BIT_MSC_COMMAND_START_MSC_MSG);
                break;
+       case MHL_READ_DEVCAP_REG:
+       case MHL_READ_XDEVCAP_REG:
+               sii8620_write(ctx, REG_MSC_CMD_OR_OFFSET, msg->reg[1]);
+               sii8620_write(ctx, REG_MSC_COMMAND_START,
+                             BIT_MSC_COMMAND_START_READ_DEVCAP);
+               break;
        default:
                dev_err(ctx->dev, "%s: command %#x not supported\n", __func__,
                        msg->reg[0]);
@@ -455,6 +461,35 @@ static void sii8620_mt_read_devcap(struct sii8620 *ctx, bool xdevcap)
        msg->recv = sii8620_mt_read_devcap_recv;
 }
 
+static void sii8620_mt_read_devcap_reg_recv(struct sii8620 *ctx,
+               struct sii8620_mt_msg *msg)
+{
+       u8 reg = msg->reg[0] & 0x7f;
+
+       if (msg->reg[0] & 0x80)
+               ctx->xdevcap[reg] = msg->ret;
+       else
+               ctx->devcap[reg] = msg->ret;
+}
+
+static void sii8620_mt_read_devcap_reg(struct sii8620 *ctx, u8 reg)
+{
+       struct sii8620_mt_msg *msg = sii8620_mt_msg_new(ctx);
+
+       if (!msg)
+               return;
+
+       msg->reg[0] = (reg & 0x80) ? MHL_READ_XDEVCAP_REG : MHL_READ_DEVCAP_REG;
+       msg->reg[1] = reg;
+       msg->send = sii8620_mt_msc_cmd_send;
+       msg->recv = sii8620_mt_read_devcap_reg_recv;
+}
+
+static inline void sii8620_mt_read_xdevcap_reg(struct sii8620 *ctx, u8 reg)
+{
+       sii8620_mt_read_devcap_reg(ctx, reg | 0x80);
+}
+
 static void sii8620_fetch_edid(struct sii8620 *ctx)
 {
        u8 lm_ddc, ddc_cmd, int3, cbus;