ARM: OMAP2xxx: hwmod/CM: add RNG integration data
authorPaul Walmsley <paul@pwsan.com>
Sun, 23 Sep 2012 23:28:25 +0000 (17:28 -0600)
committerPaul Walmsley <paul@pwsan.com>
Sun, 23 Sep 2012 23:28:25 +0000 (17:28 -0600)
Add integration data for the hardware random number generator IP block
on some OMAP SoCs.  This appears to be present on at least OMAP2xxx
and OMAP3xxx SoCs, although it is not so easy to tell.  It may also be
present on other OMAP2+ SoCs.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/cm2xxx_3xxx.c
arch/arm/mach-omap2/cm2xxx_3xxx.h
arch/arm/mach-omap2/omap_hwmod_2420_data.c
arch/arm/mach-omap2/omap_hwmod_2430_data.c
arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
arch/arm/mach-omap2/omap_hwmod_common_data.h

index a911e76b4ecf6262641f3d8fc1f207fb564c24e7..7f07ab02a5b3f8d706daff3ff4f34e27fc7fb0ae 100644 (file)
@@ -35,7 +35,7 @@
 #define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP          0x3
 
 static const u8 cm_idlest_offs[] = {
-       CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
+       CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4
 };
 
 u32 omap2_cm_read_mod_reg(s16 module, u16 idx)
index 088bbad73db541fcbceed4850e78369736bfc853..57b2f3c2fbf3469c6c99d9b72658c43d0207e819 100644 (file)
@@ -71,6 +71,7 @@
 #define OMAP24XX_CM_FCLKEN2                            0x0004
 #define OMAP24XX_CM_ICLKEN4                            0x001c
 #define OMAP24XX_CM_AUTOIDLE4                          0x003c
+#define OMAP24XX_CM_IDLEST4                            0x002c
 
 #define OMAP2430_CM_IDLEST3                            0x0028
 
index 5fcd225d207e427b775cdabbdb0e5a4aff79daca..e778ff4e18877c0983225724803c01f7d59117fe 100644 (file)
@@ -601,6 +601,7 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
        &omap2420_l4_core__mcbsp1,
        &omap2420_l4_core__mcbsp2,
        &omap2420_l4_core__msdi1,
+       &omap2xxx_l4_core__rng,
        &omap2420_l4_core__hdq1w,
        &omap2420_l4_wkup__counter_32k,
        &omap2420_l3__gpmc,
index a560563daf58a71e0842e3c0abf2dd303d0b0002..cc4ed9024372bcdd40b69243f999f3c3f1045450 100644 (file)
@@ -961,6 +961,7 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
        &omap2430_l4_core__mcbsp4,
        &omap2430_l4_core__mcbsp5,
        &omap2430_l4_core__hdq1w,
+       &omap2xxx_l4_core__rng,
        &omap2430_l4_wkup__counter_32k,
        &omap2430_l3__gpmc,
        NULL,
index 5178e40e84f941cf806dcebdc0be4fc197e9bd60..c83d6c517be4476708017f00388942d8a6bee42d 100644 (file)
@@ -129,6 +129,15 @@ struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
        { }
 };
 
+static struct omap_hwmod_addr_space omap2_rng_addr_space[] = {
+       {
+               .pa_start       = 0x480a0000,
+               .pa_end         = 0x480a004f,
+               .flags          = ADDR_TYPE_RT
+       },
+       { }
+};
+
 /*
  * Common interconnect data
  */
@@ -372,3 +381,11 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_core -> rng */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__rng = {
+       .master         = &omap2xxx_l4_core_hwmod,
+       .slave          = &omap2xxx_rng_hwmod,
+       .clk            = "rng_ick",
+       .addr           = omap2_rng_addr_space,
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
index 3c009069f2f29abdb74d660d775c8e80babdb81b..32c778bf8f08484ff6e6ecd78371d7daf2993095 100644 (file)
@@ -792,3 +792,47 @@ struct omap_hwmod omap2xxx_gpmc_hwmod = {
                },
        },
 };
+
+/* RNG */
+
+static struct omap_hwmod_class_sysconfig omap2_rng_sysc = {
+       .rev_offs       = 0x3c,
+       .sysc_offs      = 0x40,
+       .syss_offs      = 0x44,
+       .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                          SYSS_HAS_RESET_STATUS),
+       .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2_rng_hwmod_class = {
+       .name           = "rng",
+       .sysc           = &omap2_rng_sysc,
+};
+
+static struct omap_hwmod_irq_info omap2_rng_mpu_irqs[] = {
+       { .irq = 52 },
+       { .irq = -1 }
+};
+
+struct omap_hwmod omap2xxx_rng_hwmod = {
+       .name           = "rng",
+       .mpu_irqs       = omap2_rng_mpu_irqs,
+       .main_clk       = "l4_ck",
+       .prcm           = {
+               .omap2 = {
+                       .module_offs = CORE_MOD,
+                       .prcm_reg_id = 4,
+                       .module_bit = OMAP24XX_EN_RNG_SHIFT,
+                       .idlest_reg_id = 4,
+                       .idlest_idle_bit = OMAP24XX_ST_RNG_SHIFT,
+               },
+       },
+       /*
+        * XXX The first read from the SYSSTATUS register of the RNG
+        * after the SYSCONFIG SOFTRESET bit is set triggers an
+        * imprecise external abort.  It's unclear why this happens.
+        * Until this is analyzed, skip the IP block reset.
+        */
+       .flags          = HWMOD_INIT_NO_RESET,
+       .class          = &omap2_rng_hwmod_class,
+};
index 6a033b878359fd3846842c8aef233fc5a1e7b633..2bc8f1705d4aa7ce18d779c27089116990979d14 100644 (file)
@@ -2,9 +2,8 @@
  * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations
  *
  * Copyright (C) 2010-2011 Nokia Corporation
+ * Copyright (C) 2010-2012 Texas Instruments, Inc.
  * Paul Walmsley
- *
- * Copyright (C) 2010-2011 Texas Instruments, Inc.
  * BenoĆ®t Cousson
  *
  * This program is free software; you can redistribute it and/or modify
@@ -78,6 +77,7 @@ extern struct omap_hwmod omap2xxx_mcspi1_hwmod;
 extern struct omap_hwmod omap2xxx_mcspi2_hwmod;
 extern struct omap_hwmod omap2xxx_counter_32k_hwmod;
 extern struct omap_hwmod omap2xxx_gpmc_hwmod;
+extern struct omap_hwmod omap2xxx_rng_hwmod;
 
 /* Common interface data across OMAP2xxx */
 extern struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core;
@@ -104,6 +104,7 @@ extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss;
 extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc;
 extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi;
 extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc;
+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__rng;
 
 /* Common IP block data */
 extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];