drm/i915: gen 9 h/w w/a Fix stepping check
authorNick Hoath <nicholas.hoath@intel.com>
Fri, 6 Feb 2015 11:30:03 +0000 (11:30 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 13 Feb 2015 22:28:13 +0000 (23:28 +0100)
Fixed the stepping check on WaDisableDgMirrorFixInHalfSliceChicken5
to be for the correct SOC (Skylake)

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_ringbuffer.c

index 573b80f0c1536e970f7693b8ff283316e298091d..fb71e33ac4d7ff4c4c1371b9ac3fc3ebcf31691a 100644 (file)
@@ -886,7 +886,8 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
        WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
                          GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC);
 
-       if (INTEL_REVID(dev) == SKL_REVID_A0) {
+       if (INTEL_REVID(dev) >= SKL_REVID_A0 &&
+           INTEL_REVID(dev) <= SKL_REVID_B0) {
                /*
                * WaDisableDgMirrorFixInHalfSliceChicken5:skl
                * This is a pre-production w/a.