powerpc/dts: Remove T4240 emulator support

Probably we should have not upstreamed this in the first place

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

diff --git a/arch/powerpc/boot/dts/t4240emu.dts b/arch/powerpc/boot/dts/t4240emu.dts
deleted file mode 100644 (file)
index decaf35..0000000
--- a/arch/powerpc/boot/dts/t4240emu.dts
+++ /dev/null
@@ -1,281 +0,0 @@
-/*
- * T4240 emulator Device Tree Source
- *
- * Copyright 2013 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-/include/ "fsl/e6500_power_isa.dtsi"
-/ {
-       compatible = "fsl,T4240";
-       #address-cells = <2>;
-       #size-cells = <2>;
-       interrupt-parent = <&mpic>;
-
-       aliases {
-               ccsr = &soc;
-
-               serial0 = &serial0;
-               serial1 = &serial1;
-               serial2 = &serial2;
-               serial3 = &serial3;
-               dma0 = &dma0;
-               dma1 = &dma1;
-       };
-
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu0: PowerPC,e6500@0 {
-                       device_type = "cpu";
-                       reg = <0 1>;
-                       next-level-cache = <&L2_1>;
-                       fsl,portid-mapping = <0x80000000>;
-               };
-               cpu1: PowerPC,e6500@2 {
-                       device_type = "cpu";
-                       reg = <2 3>;
-                       next-level-cache = <&L2_1>;
-                       fsl,portid-mapping = <0x80000000>;
-               };
-               cpu2: PowerPC,e6500@4 {
-                       device_type = "cpu";
-                       reg = <4 5>;
-                       next-level-cache = <&L2_1>;
-                       fsl,portid-mapping = <0x80000000>;
-               };
-               cpu3: PowerPC,e6500@6 {
-                       device_type = "cpu";
-                       reg = <6 7>;
-                       next-level-cache = <&L2_1>;
-                       fsl,portid-mapping = <0x80000000>;
-               };
-
-               cpu4: PowerPC,e6500@8 {
-                       device_type = "cpu";
-                       reg = <8 9>;
-                       next-level-cache = <&L2_2>;
-                       fsl,portid-mapping = <0x40000000>;
-               };
-               cpu5: PowerPC,e6500@10 {
-                       device_type = "cpu";
-                       reg = <10 11>;
-                       next-level-cache = <&L2_2>;
-                       fsl,portid-mapping = <0x40000000>;
-               };
-               cpu6: PowerPC,e6500@12 {
-                       device_type = "cpu";
-                       reg = <12 13>;
-                       next-level-cache = <&L2_2>;
-                       fsl,portid-mapping = <0x40000000>;
-               };
-               cpu7: PowerPC,e6500@14 {
-                       device_type = "cpu";
-                       reg = <14 15>;
-                       next-level-cache = <&L2_2>;
-                       fsl,portid-mapping = <0x40000000>;
-               };
-
-               cpu8: PowerPC,e6500@16 {
-                       device_type = "cpu";
-                       reg = <16 17>;
-                       next-level-cache = <&L2_3>;
-                       fsl,portid-mapping = <0x20000000>;
-               };
-               cpu9: PowerPC,e6500@18 {
-                       device_type = "cpu";
-                       reg = <18 19>;
-                       next-level-cache = <&L2_3>;
-                       fsl,portid-mapping = <0x20000000>;
-               };
-               cpu10: PowerPC,e6500@20 {
-                       device_type = "cpu";
-                       reg = <20 21>;
-                       next-level-cache = <&L2_3>;
-                       fsl,portid-mapping = <0x20000000>;
-               };
-               cpu11: PowerPC,e6500@22 {
-                       device_type = "cpu";
-                       reg = <22 23>;
-                       next-level-cache = <&L2_3>;
-                       fsl,portid-mapping = <0x20000000>;
-               };
-       };
-};
-
-/ {
-       model = "fsl,T4240QDS";
-       compatible = "fsl,T4240EMU", "fsl,T4240QDS";
-       #address-cells = <2>;
-       #size-cells = <2>;
-       interrupt-parent = <&mpic>;
-
-       ifc: localbus@ffe124000 {
-               reg = <0xf 0xfe124000 0 0x2000>;
-               ranges = <0 0 0xf 0xe8000000 0x08000000
-                         2 0 0xf 0xff800000 0x00010000
-                         3 0 0xf 0xffdf0000 0x00008000>;
-
-               nor@0,0 {
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       compatible = "cfi-flash";
-                       reg = <0x0 0x0 0x8000000>;
-
-                       bank-width = <2>;
-                       device-width = <1>;
-               };
-
-       };
-
-       memory {
-               device_type = "memory";
-       };
-
-       soc: soc@ffe000000 {
-               ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-               reg = <0xf 0xfe000000 0 0x00001000>;
-
-       };
-};
-
-&ifc {
-       #address-cells = <2>;
-       #size-cells = <1>;
-       compatible = "fsl,ifc", "simple-bus";
-       interrupts = <25 2 0 0>;
-};
-
-&soc {
-       #address-cells = <1>;
-       #size-cells = <1>;
-       device_type = "soc";
-       compatible = "simple-bus";
-
-       soc-sram-error {
-               compatible = "fsl,soc-sram-error";
-               interrupts = <16 2 1 29>;
-       };
-
-       corenet-law@0 {
-               compatible = "fsl,corenet-law";
-               reg = <0x0 0x1000>;
-               fsl,num-laws = <32>;
-       };
-
-       ddr1: memory-controller@8000 {
-               compatible = "fsl,qoriq-memory-controller-v4.7",
-                               "fsl,qoriq-memory-controller";
-               reg = <0x8000 0x1000>;
-               interrupts = <16 2 1 23>;
-       };
-
-       ddr2: memory-controller@9000 {
-               compatible = "fsl,qoriq-memory-controller-v4.7",
-                               "fsl,qoriq-memory-controller";
-               reg = <0x9000 0x1000>;
-               interrupts = <16 2 1 22>;
-       };
-
-       ddr3: memory-controller@a000 {
-               compatible = "fsl,qoriq-memory-controller-v4.7",
-                               "fsl,qoriq-memory-controller";
-               reg = <0xa000 0x1000>;
-               interrupts = <16 2 1 21>;
-       };
-
-       cpc: l3-cache-controller@10000 {
-               compatible = "fsl,t4240-l3-cache-controller", "cache";
-               reg = <0x10000 0x1000
-                      0x11000 0x1000
-                      0x12000 0x1000>;
-               interrupts = <16 2 1 27
-                             16 2 1 26
-                             16 2 1 25>;
-       };
-
-       corenet-cf@18000 {
-               compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
-               reg = <0x18000 0x1000>;
-               interrupts = <16 2 1 31>;
-               fsl,ccf-num-csdids = <32>;
-               fsl,ccf-num-snoopids = <32>;
-       };
-
-       iommu@20000 {
-               compatible = "fsl,pamu-v1.0", "fsl,pamu";
-               reg = <0x20000 0x6000>;
-               fsl,portid-mapping = <0x8000>;
-               interrupts = <
-                       24 2 0 0
-                       16 2 1 30>;
-       };
-
-/include/ "fsl/qoriq-mpic.dtsi"
-
-       guts: global-utilities@e0000 {
-               compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
-               reg = <0xe0000 0xe00>;
-               fsl,has-rstcr;
-               fsl,liodn-bits = <12>;
-       };
-
-/include/ "fsl/qoriq-clockgen2.dtsi"
-       global-utilities@e1000 {
-               compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
-       };
-
-/include/ "fsl/qoriq-dma-0.dtsi"
-/include/ "fsl/qoriq-dma-1.dtsi"
-
-/include/ "fsl/qoriq-i2c-0.dtsi"
-/include/ "fsl/qoriq-i2c-1.dtsi"
-/include/ "fsl/qoriq-duart-0.dtsi"
-/include/ "fsl/qoriq-duart-1.dtsi"
-
-       L2_1: l2-cache-controller@c20000 {
-               compatible = "fsl,t4240-l2-cache-controller";
-               reg = <0xc20000 0x40000>;
-               next-level-cache = <&cpc>;
-       };
-       L2_2: l2-cache-controller@c60000 {
-               compatible = "fsl,t4240-l2-cache-controller";
-               reg = <0xc60000 0x40000>;
-               next-level-cache = <&cpc>;
-       };
-       L2_3: l2-cache-controller@ca0000 {
-               compatible = "fsl,t4240-l2-cache-controller";
-               reg = <0xca0000 0x40000>;
-               next-level-cache = <&cpc>;
-       };
-};