drm/i915/bxt, glk: Fix assert on conditions for DC9 enabling
authorImre Deak <imre.deak@intel.com>
Thu, 29 Jun 2017 15:37:00 +0000 (18:37 +0300)
committerImre Deak <imre.deak@intel.com>
Thu, 6 Jul 2017 13:29:25 +0000 (16:29 +0300)
What we want to assert based on the conditions required by Bspec is that
power well 2 is disabled, so no need to check for other power wells.
In addition we can only check if the driver's request is removed, the
actual state depends on whether the other request bits are set or not
(BIOS, KVMR, DEBUG). So check only the driver's request bit.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498750622-14023-4-git-send-email-imre.deak@intel.com
drivers/gpu/drm/i915/intel_runtime_pm.c

index 8418879c287ac2e4644f0bcac99f14860baae86e..1fc75e6769bc5ffe71f0b849a3e32698903f8a9d 100644 (file)
@@ -549,7 +549,9 @@ static void assert_can_enable_dc9(struct drm_i915_private *dev_priv)
                  "DC9 already programmed to be enabled.\n");
        WARN_ONCE(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5,
                  "DC5 still not disabled to enable DC9.\n");
-       WARN_ONCE(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on.\n");
+       WARN_ONCE(I915_READ(HSW_PWR_WELL_DRIVER) &
+                 SKL_POWER_WELL_REQ(SKL_DISP_PW_2),
+                 "Power well 2 on.\n");
        WARN_ONCE(intel_irqs_enabled(dev_priv),
                  "Interrupts not disabled yet.\n");