if (r)
return r;
- dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC);
+ dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
if (r)
fck = dsi_get_pll_hsdiv_dispc_rate();
- dispc_cinfo.lck_div = dssdev->clocks.dispc.lck_div;
- dispc_cinfo.pck_div = dssdev->clocks.dispc.pck_div;
+ dispc_cinfo.lck_div = dssdev->clocks.dispc.channel.lck_div;
+ dispc_cinfo.pck_div = dssdev->clocks.dispc.channel.pck_div;
r = dispc_calc_clock_rates(fck, &dispc_cinfo);
if (r) {
if (r)
goto err1;
- dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC);
- dss_select_dsi_clk_source(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI);
+ dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
+ dss_select_dsi_clk_source(dssdev->clocks.dsi.dsi_fclk_src);
dss_select_lcd_clk_source(dssdev->manager->id,
- OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC);
+ dssdev->clocks.dispc.channel.lcd_clk_src);
DSSDBG("PLL OK\n");
struct {
struct {
- u16 lck_div;
- u16 pck_div;
+ struct {
+ u16 lck_div;
+ u16 pck_div;
+ enum omap_dss_clk_source lcd_clk_src;
+ } channel;
+
+ enum omap_dss_clk_source dispc_fclk_src;
} dispc;
struct {
u16 regm_dsi;
u16 lp_clk_div;
+ enum omap_dss_clk_source dsi_fclk_src;
} dsi;
} clocks;