ixgbe: Enable support for recognizing PCI-e Gen3 link speed
authorJacob Keller <jacob.e.keller@intel.com>
Fri, 15 Feb 2013 09:18:10 +0000 (09:18 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Thu, 18 Apr 2013 04:37:03 +0000 (21:37 -0700)
This patch adds support for displaying PCIe Gen3 link speed, which was
previously missing from the driver.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h

index f8d3deccc9b2c8071fc269b030f909feac65565e..3f66abc45a2e75f9fbd06edcb17b3bb6ea1a686f 100644 (file)
@@ -635,6 +635,9 @@ s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw)
        case IXGBE_PCI_LINK_SPEED_5000:
                hw->bus.speed = ixgbe_bus_speed_5000;
                break;
+       case IXGBE_PCI_LINK_SPEED_8000:
+               hw->bus.speed = ixgbe_bus_speed_8000;
+               break;
        default:
                hw->bus.speed = ixgbe_bus_speed_unknown;
                break;
index 0e7f0dd14d5f3323062b5a5963d19ffff0539c57..54e7d0981039635fe5e916bad76b985fa0d1e99a 100644 (file)
@@ -7490,7 +7490,8 @@ skip_sriov:
 
        /* print bus type/speed/width info */
        e_dev_info("(PCI Express:%s:%s) %pM\n",
-                  (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
+                  (hw->bus.speed == ixgbe_bus_speed_8000 ? "8.0GT/s" :
+                   hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
                    hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
                    "Unknown"),
                   (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
index 6652e96c352d3743ff72ebff0a305dbc977b51cb..05df36ef9884309174f093e66c87f18e627f0273 100644 (file)
@@ -1827,6 +1827,7 @@ enum {
 #define IXGBE_PCI_LINK_SPEED      0xF
 #define IXGBE_PCI_LINK_SPEED_2500 0x1
 #define IXGBE_PCI_LINK_SPEED_5000 0x2
+#define IXGBE_PCI_LINK_SPEED_8000 0x3
 #define IXGBE_PCI_HEADER_TYPE_REGISTER  0x0E
 #define IXGBE_PCI_HEADER_TYPE_MULTIFUNC 0x80
 #define IXGBE_PCI_DEVICE_CONTROL2_16ms  0x0005
@@ -2650,6 +2651,7 @@ enum ixgbe_bus_speed {
        ixgbe_bus_speed_133     = 133,
        ixgbe_bus_speed_2500    = 2500,
        ixgbe_bus_speed_5000    = 5000,
+       ixgbe_bus_speed_8000    = 8000,
        ixgbe_bus_speed_reserved
 };