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clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll
author
Sachin Kamat
<sachin.kamat@linaro.org>
Thu, 19 Dec 2013 08:33:39 +0000
(14:03 +0530)
committer
Tomasz Figa
<t.figa@samsung.com>
Mon, 30 Dec 2013 17:43:28 +0000
(18:43 +0100)
Add CLK_SET_RATE_PARENT flag to mout_apll clock. This will let us set the
clock rate in the cpufreq driver.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c
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diff --git
a/drivers/clk/samsung/clk-exynos5250.c
b/drivers/clk/samsung/clk-exynos5250.c
index d54f4212d4e9aee27821a3b873901d46ca05be2a..cbbe423d4e2b51ef630b5b6de272c4b60e43ec2b 100644
(file)
--- a/
drivers/clk/samsung/clk-exynos5250.c
+++ b/
drivers/clk/samsung/clk-exynos5250.c
@@
-262,7
+262,8
@@
static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = {
/*
* CMU_CPU
*/
- MUX_A(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, "mout_apll"),
+ MUX_FA(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
+ CLK_SET_RATE_PARENT, 0, "mout_apll"),
MUX_A(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"),
/*