[RAMEN9610-10029][COMMON] media: mfc: add memset only for firmware except code region

This adds memset '0' to the firmware memory except fw code region.
And also this change to do not use the memory clear by ION allocator
because the firmware performs the memory clear. Since the firmware can not
clear the stack area by itself, it is only cleared by the driver.

Change-Id: Ifea58165d562280b5459c39852f21f34501c4370
Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com>

diff --git a/drivers/media/platform/exynos/mfc/mfc_buf.c b/drivers/media/platform/exynos/mfc/mfc_buf.c
index 4d7d25f7109ccb43fec7bd7688057f73e6a20d9f..d4d2e47fc8e060d47ff18b5f507dbc3416c668e5 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_buf.c
+++ b/drivers/media/platform/exynos/mfc/mfc_buf.c
@@ -601,8 +601,13 @@ int mfc_load_firmware(struct mfc_dev *dev)
                return -EINVAL;
        }
 
+       /*  This adds to clear with '0' for firmware memory except code region. */
+       mfc_debug(4, "[F/W] memset before memcpy for normal fw\n");
+       memset((dev->fw_buf.vaddr + fw_blob->size), 0, (firmware_size - fw_blob->size));
        memcpy(dev->fw_buf.vaddr, fw_blob->data, fw_blob->size);
        if (dev->drm_fw_buf.vaddr) {
+               mfc_debug(4, "[F/W] memset before memcpy for secure fw\n");
+               memset((dev->drm_fw_buf.vaddr + fw_blob->size), 0, (firmware_size - fw_blob->size));
                memcpy(dev->drm_fw_buf.vaddr, fw_blob->data, fw_blob->size);
                mfc_debug(4, "[F/W] copy firmware to secure region\n");
        }

diff --git a/drivers/media/platform/exynos/mfc/mfc_cmd.c b/drivers/media/platform/exynos/mfc/mfc_cmd.c
index 7e54f3de37a129ee91014ab7bd319ee9f2820aa5..f238595344f70c946524cee223c0f95a8503f387 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_cmd.c
+++ b/drivers/media/platform/exynos/mfc/mfc_cmd.c
@@ -95,7 +95,11 @@ void mfc_cmd_open_inst(struct mfc_ctx *ctx)
        MFC_WRITEL(reg, MFC_REG_CODEC_CONTROL);
 
        mfc_debug(2, "Requested codec mode: %d\n", ctx->codec_mode);
-       MFC_WRITEL(ctx->codec_mode, MFC_REG_CODEC_TYPE);
+       reg = ctx->codec_mode & MFC_REG_CODEC_TYPE_MASK;
+       reg |= (0x1 << MFC_REG_CLEAR_CTX_MEM_SHIFT);
+       mfc_debug(2, "Enable to clear context memory: %#x\n", reg);
+       MFC_WRITEL(reg, MFC_REG_CODEC_TYPE);
+
        MFC_WRITEL(ctx->instance_ctx_buf.daddr, MFC_REG_CONTEXT_MEM_ADDR);
        MFC_WRITEL(ctx->instance_ctx_buf.size, MFC_REG_CONTEXT_MEM_SIZE);
        if (ctx->type == MFCINST_DECODER)

diff --git a/drivers/media/platform/exynos/mfc/mfc_mem.c b/drivers/media/platform/exynos/mfc/mfc_mem.c
index e9423d3743cc0fc1dff8b591dc990e86b0758a13..b5a84608f7acbeec6b902dd39337923d2ef26c34 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_mem.c
+++ b/drivers/media/platform/exynos/mfc/mfc_mem.c
@@ -81,25 +81,23 @@ int mfc_mem_ion_alloc(struct mfc_dev *dev,
                struct mfc_special_buf *special_buf)
 {
        struct mfc_ctx *ctx = dev->ctx[dev->curr_ctx];
-       int flag;
+       int flag = ION_FLAG_NOZEROED;
        const char *heapname;
 
        switch (special_buf->buftype) {
        case MFCBUF_NORMAL:
                heapname = "ion_system_heap";
-               flag = 0;
                break;
        case MFCBUF_NORMAL_FW:
                heapname = "vnfw_heap";
-               flag = 0;
                break;
        case MFCBUF_DRM:
                heapname = "vframe_heap";
-               flag = ION_FLAG_PROTECTED;
+               flag |= ION_FLAG_PROTECTED;
                break;
        case MFCBUF_DRM_FW:
                heapname = "vfw_heap";
-               flag = ION_FLAG_PROTECTED;
+               flag |= ION_FLAG_PROTECTED;
                break;
        default:
                heapname = "unknown";

diff --git a/drivers/media/platform/exynos/mfc/mfc_regs.h b/drivers/media/platform/exynos/mfc/mfc_regs.h
index cf7537695115e10168c70475f68418c41168c9df..f5e0368c81c1ea57c58ceb6eadf614154c6071a2 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_regs.h
+++ b/drivers/media/platform/exynos/mfc/mfc_regs.h
@@ -574,6 +574,10 @@
 #define MFC_REG_CODEC_BPG_DEC                          32
 #define MFC_REG_CODEC_BPG_ENC                          33
 
+/* 0xF00C: MFC_REG_CODEC_TYPE */
+#define MFC_REG_CLEAR_CTX_MEM_SHIFT                    16
+#define MFC_REG_CODEC_TYPE_MASK                                0xFFFF
+
 /* 0xF028: MFC_REG_MFC_VERSION */
 #define MFC_REG_MFC_VER_MASK                           0xFFFFFFFF
 #define MFC_REG_MFC_VER_SHFT                           0