[COMMON] spi: s3c64xx: add CONFIG_ARM64_EXYNOS_CPUIDLE

Change-Id: I795a41f9a5f6259703e9be97953b4d38040d41bb
Signed-off-by: myung-su.cha <myung-su.cha@samsung.com>

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 8dd8c6ff08f2c3d7c3ce47b76d7c66f77b73cad0..e400d1c89b25a485fdbfcd0eb099bdc96e54bae6 100644 (file)
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -33,6 +33,9 @@
 
 #include <linux/dma/dma-pl330.h>
 
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
+#include <soc/samsung/exynos-powermode.h>
+#endif
 #ifdef CONFIG_CPU_IDLE
 #include <soc/samsung/exynos-pm.h>
 #include <soc/samsung/exynos-cpupm.h>
@@ -1546,7 +1549,9 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
        sdd->is_probed = 0;
        sdd->ops = NULL;
 
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
        sdd->idle_ip_index = exynos_get_idle_ip_index(dev_name(&pdev->dev));
+#endif
 
        if (pdev->dev.of_node) {
                ret = of_alias_get_id(pdev->dev.of_node, "spi");
@@ -1656,7 +1661,9 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
                }
        }
 #else
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
        exynos_update_ip_idle_status(sdd->idle_ip_index, 0);
+#endif
 
        if (clk_prepare_enable(sdd->clk)) {
                dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
@@ -1779,7 +1786,9 @@ static int s3c64xx_spi_remove(struct platform_device *pdev)
 
        clk_disable_unprepare(sdd->clk);
 
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
        exynos_update_ip_idle_status(sdd->idle_ip_index, 1);
+#endif
 
        platform_set_drvdata(pdev, NULL);
        spi_master_put(master);
@@ -1818,7 +1827,9 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev)
        if (__clk_get_enable_count(sdd->src_clk))
                clk_disable_unprepare(sdd->src_clk);
 
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
        exynos_update_ip_idle_status(sdd->idle_ip_index, 1);
+#endif
 
        /* Free DMA channels */
        if (sci->dma_mode == DMA_MODE && sdd->is_probed && sdd->ops != NULL) {
@@ -1857,14 +1868,18 @@ static int s3c64xx_spi_runtime_resume(struct device *dev)
        }
 
        if (sci->domain == DOMAIN_TOP) {
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
                exynos_update_ip_idle_status(sdd->idle_ip_index, 0);
+#endif
                clk_prepare_enable(sdd->src_clk);
                clk_prepare_enable(sdd->clk);
        }
 
 #if defined(CONFIG_VIDEO_EXYNOS_FIMC_IS) || defined(CONFIG_VIDEO_EXYNOS_FIMC_IS2)
        else if (sci->domain == DOMAIN_CAM1 || sci->domain == DOMAIN_ISP) {
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
                exynos_update_ip_idle_status(sdd->idle_ip_index, 0);
+#endif
                clk_prepare_enable(sdd->src_clk);
                clk_prepare_enable(sdd->clk);
 
@@ -1897,7 +1912,9 @@ static int s3c64xx_spi_suspend_operation(struct device *dev)
                /* Disable the clock */
                clk_disable_unprepare(sdd->src_clk);
                clk_disable_unprepare(sdd->clk);
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
                exynos_update_ip_idle_status(sdd->idle_ip_index, 1);
+#endif
        }
 #endif
        if (!pm_runtime_status_suspended(dev))
@@ -1920,7 +1937,9 @@ static int s3c64xx_spi_resume_operation(struct device *dev)
 
        if (sci->domain == DOMAIN_TOP) {
                /* Enable the clock */
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
                exynos_update_ip_idle_status(sdd->idle_ip_index, 0);
+#endif
                clk_prepare_enable(sdd->src_clk);
                clk_prepare_enable(sdd->clk);
 
@@ -1938,7 +1957,9 @@ static int s3c64xx_spi_resume_operation(struct device *dev)
                /* Disable the clock */
                clk_disable_unprepare(sdd->src_clk);
                clk_disable_unprepare(sdd->clk);
+#ifdef CONFIG_ARM64_EXYNOS_CPUIDLE
                exynos_update_ip_idle_status(sdd->idle_ip_index, 1);
+#endif
 #endif
        }