drm/i915: properly clear SSC1 bit in the pch refclock init code

Noticed by staring at intel_reg_dumper diffs. Unfortunately it does
not seem to completely fix the bug.

Still, it's good to get this right, and maybe it helps someplace else.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47117
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ec6ea92da53856e6a18e3a28cf2032c1eb5a5fea..91b35fd1db8c81ee06984de0aaae88824929cddd 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5539,7 +5539,8 @@ void ironlake_init_pch_refclk(struct drm_device *dev)
                if (intel_panel_use_ssc(dev_priv) && can_ssc) {
                        DRM_DEBUG_KMS("Using SSC on panel\n");
                        temp |= DREF_SSC1_ENABLE;
-               }
+               } else
+                       temp &= ~DREF_SSC1_ENABLE;
 
                /* Get SSC going before enabling the outputs */
                I915_WRITE(PCH_DREF_CONTROL, temp);