ath9k_hw: Fix concurrent tx on lower tx power
authorRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Thu, 25 Oct 2012 11:46:52 +0000 (17:16 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 29 Oct 2012 19:30:32 +0000 (15:30 -0400)
Whenever WLAN receives scheduling msg from BT, it reduces tx power
based on RSSI level. And then BT starts simultaneous transmission
along with WLAN. Sometimes HW MAC compares tx power that is used
prior to power reduction which is causing BT transmission to defer.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_mci.c
drivers/net/wireless/ath/ath9k/reg.h

index b04fa46228225f0ba0e38c9ef1b8e81ac4bb6d22..42b4412d6794b3b141acf37cdb99709d4491404f 100644 (file)
@@ -881,9 +881,12 @@ int ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g,
        REG_RMW_FIELD(ah, AR_BTCOEX_CTRL3,
                      AR_BTCOEX_CTRL3_CONT_INFO_TIMEOUT, 20);
 
-       REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, AR_BTCOEX_CTRL2_RX_DEWEIGHT, 1);
+       REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, AR_BTCOEX_CTRL2_RX_DEWEIGHT, 0);
        REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
 
+       /* Set the time out to 3.125ms (5 BT slots) */
+       REG_RMW_FIELD(ah, AR_BTCOEX_WL_LNA, AR_BTCOEX_WL_LNA_TIMEOUT, 0x3D090);
+
        /* concurrent tx priority */
        if (mci->config & ATH_MCI_CONFIG_CONCUR_TX) {
                REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2,
index e9dec138b9134c62b0661fa059ac1d836c345266..ad3c82c091775a7011f7a0638da7522e15685c83 100644 (file)
@@ -2311,6 +2311,8 @@ enum {
 #define AR_BTCOEX_MAX_TXPWR(_x)                                (0x18c0 + ((_x) << 2))
 #define AR_BTCOEX_WL_LNA                               0x1940
 #define AR_BTCOEX_RFGAIN_CTRL                          0x1944
+#define AR_BTCOEX_WL_LNA_TIMEOUT                       0x003FFFFF
+#define AR_BTCOEX_WL_LNA_TIMEOUT_S                     0
 
 #define AR_BTCOEX_CTRL2                                        0x1948
 #define AR_BTCOEX_CTRL2_TXPWR_THRESH                   0x0007F800