drm/amdgpu: implement vcn start RB command

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 643e4cecc3f6d397218c30d864689d328ea1cb14..2fd60de1377e78528644ac886c265b0c6f630d74 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -488,6 +488,23 @@ static void vcn_v1_0_dec_ring_set_wptr(struct amdgpu_ring *ring)
        WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_RBC_RB_WPTR), lower_32_bits(ring->wptr));
 }
 
+/**
+ * vcn_v1_0_dec_ring_insert_start - insert a start command
+ *
+ * @ring: amdgpu_ring pointer
+ *
+ * Write a start command to the ring.
+ */
+static void vcn_v1_0_dec_ring_insert_start(struct amdgpu_ring *ring)
+{
+       amdgpu_ring_write(ring,
+               PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));
+       amdgpu_ring_write(ring, 0);
+       amdgpu_ring_write(ring,
+               PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));
+       amdgpu_ring_write(ring, VCN_CMD_PACKET_START << 1);
+}
+
 /**
  * vcn_v1_0_dec_ring_emit_fence - emit an fence & trap command
  *
@@ -683,7 +700,8 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
        .emit_frame_size =
                2 + /* vcn_v1_0_dec_ring_emit_hdp_invalidate */
                34 * AMDGPU_MAX_VMHUBS + /* vcn_v1_0_dec_ring_emit_vm_flush */
-               14 + 14, /* vcn_v1_0_dec_ring_emit_fence x2 vm fence */
+               14 + 14 + /* vcn_v1_0_dec_ring_emit_fence x2 vm fence */
+               4,
        .emit_ib_size = 8, /* vcn_v1_0_dec_ring_emit_ib */
        .emit_ib = vcn_v1_0_dec_ring_emit_ib,
        .emit_fence = vcn_v1_0_dec_ring_emit_fence,
@@ -692,6 +710,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
        .test_ring = amdgpu_vcn_dec_ring_test_ring,
        .test_ib = amdgpu_vcn_dec_ring_test_ib,
        .insert_nop = amdgpu_ring_insert_nop,
+       .insert_start = vcn_v1_0_dec_ring_insert_start,
        .pad_ib = amdgpu_ring_generic_pad_ib,
        .begin_use = amdgpu_vcn_ring_begin_use,
        .end_use = amdgpu_vcn_ring_end_use,