drm/i915: Add Backlight Control using DPCD for eDP connectors (v9)
authorYetunde Adebisi <yetundex.adebisi@intel.com>
Tue, 5 Apr 2016 14:10:52 +0000 (15:10 +0100)
committerJani Nikula <jani.nikula@intel.com>
Tue, 26 Apr 2016 12:17:54 +0000 (15:17 +0300)
This patch adds support for eDP backlight control using DPCD registers to
backlight hooks in intel_panel.

It checks for backlight control over AUX channel capability and sets up
function pointers to get and set the backlight brightness level if
supported.

v2: Moved backlight functions from intel_dp.c into a new file
intel_dp_aux_backlight.c. Also moved reading of eDP display control
registers to intel_dp_get_dpcd

v3: Correct some formatting mistakes

v4: Updated to use AUX backlight control if PWM control is not possible
(Jani)
v5: Moved call to initialize backlight registers to dp_aux_setup_backlight
v6: Check DP_EDP_BACKLIGHT_PIN_ENABLE_CAP is disabled before setting up AUX
backlight control. To fix BLM_PWM_ENABLE igt test warnings on bdw_ultra
v7: Add enable_dpcd_backlight module parameter.
v8: Rebase onto latest drm-intel-nightly branch
v9: Remove changes to intel_dp_dpcd_read_wake
    Split addition edp_dpcd variable into a separate patch

Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com>
[Jani: whitepace changes to appease checkpatch]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459865452-9138-4-git-send-email-yetundex.adebisi@intel.com
drivers/gpu/drm/i915/Makefile
drivers/gpu/drm/i915/i915_params.c
drivers/gpu/drm/i915/i915_params.h
drivers/gpu/drm/i915/intel_dp_aux_backlight.c [new file with mode: 0644]
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_panel.c

index 0b88ba0f3c1f4977697603f6306c2fc0287e7b53..723c50251127ef87a2cc4a7062b979b3e85c3b30 100644 (file)
@@ -81,6 +81,7 @@ i915-y += dvo_ch7017.o \
          dvo_tfp410.o \
          intel_crt.o \
          intel_ddi.o \
+         intel_dp_aux_backlight.o \
          intel_dp_link_training.o \
          intel_dp_mst.o \
          intel_dp.o \
index 1779f02e6df8fd3c406034b4bad1e3f9577e47b2..383c076919edf6205dd6f4bc39a4f9981719e626 100644 (file)
@@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = {
        .guc_log_level = -1,
        .enable_dp_mst = true,
        .inject_load_failure = 0,
+       .enable_dpcd_backlight = false,
 };
 
 module_param_named(modeset, i915.modeset, int, 0400);
@@ -210,3 +211,6 @@ MODULE_PARM_DESC(enable_dp_mst,
 module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400);
 MODULE_PARM_DESC(inject_load_failure,
        "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
+module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600);
+MODULE_PARM_DESC(enable_dpcd_backlight,
+       "Enable support for DPCD backlight control (default:false)");
index 02bc27804291296a9303088af9c6cc082f2299fd..65e73dd7d970561d3c7abe509d0f809a15fc21f6 100644 (file)
@@ -61,6 +61,7 @@ struct i915_params {
        bool verbose_state_checks;
        bool nuclear_pageflip;
        bool enable_dp_mst;
+       bool enable_dpcd_backlight;
 };
 
 extern struct i915_params i915 __read_mostly;
diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
new file mode 100644 (file)
index 0000000..6532e22
--- /dev/null
@@ -0,0 +1,172 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "intel_drv.h"
+
+static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
+{
+       uint8_t reg_val = 0;
+
+       if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
+                             &reg_val) < 0) {
+               DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
+                             DP_EDP_DISPLAY_CONTROL_REGISTER);
+               return;
+       }
+       if (enable)
+               reg_val |= DP_EDP_BACKLIGHT_ENABLE;
+       else
+               reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE);
+
+       if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
+                              reg_val) != 1) {
+               DRM_DEBUG_KMS("Failed to %s aux backlight\n",
+                             enable ? "enable" : "disable");
+       }
+}
+
+/*
+ * Read the current backlight value from DPCD register(s) based
+ * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported
+ */
+static uint32_t intel_dp_aux_get_backlight(struct intel_connector *connector)
+{
+       struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
+       uint8_t read_val[2] = { 0x0 };
+       uint16_t level = 0;
+
+       if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
+                            &read_val, sizeof(read_val)) < 0) {
+               DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
+                             DP_EDP_BACKLIGHT_BRIGHTNESS_MSB);
+               return 0;
+       }
+       level = read_val[0];
+       if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
+               level = (read_val[0] << 8 | read_val[1]);
+
+       return level;
+}
+
+/*
+ * Sends the current backlight level over the aux channel, checking if its using
+ * 8-bit or 16 bit value (MSB and LSB)
+ */
+static void
+intel_dp_aux_set_backlight(struct intel_connector *connector, u32 level)
+{
+       struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
+       uint8_t vals[2] = { 0x0 };
+
+       vals[0] = level;
+
+       /* Write the MSB and/or LSB */
+       if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) {
+               vals[0] = (level & 0xFF00) >> 8;
+               vals[1] = (level & 0xFF);
+       }
+       if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
+                             vals, sizeof(vals)) < 0) {
+               DRM_DEBUG_KMS("Failed to write aux backlight level\n");
+               return;
+       }
+}
+
+static void intel_dp_aux_enable_backlight(struct intel_connector *connector)
+{
+       struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
+       uint8_t dpcd_buf = 0;
+
+       set_aux_backlight_enable(intel_dp, true);
+
+       if ((drm_dp_dpcd_readb(&intel_dp->aux,
+                              DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) == 1) &&
+           ((dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) ==
+            DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET))
+               drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER,
+                                  (dpcd_buf | DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD));
+}
+
+static void intel_dp_aux_disable_backlight(struct intel_connector *connector)
+{
+       set_aux_backlight_enable(enc_to_intel_dp(&connector->encoder->base), false);
+}
+
+static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
+                                       enum pipe pipe)
+{
+       struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
+       struct intel_panel *panel = &connector->panel;
+
+       intel_dp_aux_enable_backlight(connector);
+
+       if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
+               panel->backlight.max = 0xFFFF;
+       else
+               panel->backlight.max = 0xFF;
+
+       panel->backlight.min = 0;
+       panel->backlight.level = intel_dp_aux_get_backlight(connector);
+
+       panel->backlight.enabled = panel->backlight.level != 0;
+
+       return 0;
+}
+
+static bool
+intel_dp_aux_display_control_capable(struct intel_connector *connector)
+{
+       struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
+
+       /* Check the  eDP Display control capabilities registers to determine if
+        * the panel can support backlight control over the aux channel
+        */
+       if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP &&
+           (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) &&
+           !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) ||
+             (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) {
+               DRM_DEBUG_KMS("AUX Backlight Control Supported!\n");
+               return true;
+       }
+       return false;
+}
+
+int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
+{
+       struct intel_panel *panel = &intel_connector->panel;
+
+       if (!i915.enable_dpcd_backlight)
+               return -ENODEV;
+
+       if (!intel_dp_aux_display_control_capable(intel_connector))
+               return -ENODEV;
+
+       panel->backlight.setup = intel_dp_aux_setup_backlight;
+       panel->backlight.enable = intel_dp_aux_enable_backlight;
+       panel->backlight.disable = intel_dp_aux_disable_backlight;
+       panel->backlight.set = intel_dp_aux_set_backlight;
+       panel->backlight.get = intel_dp_aux_get_backlight;
+
+       return 0;
+}
index 99db8bb0084bef9ebe08add0aa6c2c86ed527c70..cb89a35a6755cc3e38e49cbc99feccb786f14ddb 100644 (file)
@@ -1337,6 +1337,9 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
 bool
 intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]);
 
+/* intel_dp_aux_backlight.c */
+int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector);
+
 /* intel_dp_mst.c */
 int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
 void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
index a0788763757b0d650ab25d213aea9d1b5c8c032d..828f0fcaaaf887f37ecfe877cdaa2e4642080351 100644 (file)
@@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
                container_of(panel, struct intel_connector, panel);
        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 
+       if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
+           intel_dp_aux_init_backlight_funcs(connector) == 0)
+               return;
+
        if (IS_BROXTON(dev_priv)) {
                panel->backlight.setup = bxt_setup_backlight;
                panel->backlight.enable = bxt_enable_backlight;