firewire: ohci: do not clear PHY interrupt status inadvertently
authorClemens Ladisch <clemens@ladisch.de>
Thu, 1 Apr 2010 14:40:18 +0000 (16:40 +0200)
committerStefan Richter <stefanr@s5r6.in-berlin.de>
Sat, 10 Apr 2010 14:51:14 +0000 (16:51 +0200)
The interrupt status bits in PHY register 5 are cleared by writing a one
bit.  To avoid clearing them unadvertently, do not write them back when
they were read as set, but only when they have been explicitly requested
to be set.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
drivers/firewire/core.h
drivers/firewire/ohci.c

index fb0321300cce4a01b646e77a5f0d040c0f46f25d..b2a7b651473a1c9a496992bb905c8c73eff2befb 100644 (file)
@@ -28,6 +28,7 @@ struct fw_packet;
 #define PHY_CONTENDER          0x40
 #define PHY_BUS_RESET          0x40
 #define PHY_BUS_SHORT_RESET    0x40
+#define PHY_INT_STATUS_BITS    0x3c
 
 #define BANDWIDTH_AVAILABLE_INITIAL    4915
 #define BROADCAST_CHANNEL_INITIAL      (1 << 31 | 31)
index 8ebccda94df9889e401514f406dbb6d54d43c955..525848f71c342fb8b2a400e8fab36093fdbea774 100644 (file)
@@ -490,6 +490,13 @@ static int ohci_update_phy_reg(struct fw_card *card, int addr,
        if (err < 0)
                return err;
 
+       /*
+        * The interrupt status bits are cleared by writing a one bit.
+        * Avoid clearing them unless explicitly requested in set_bits.
+        */
+       if (addr == 5)
+               clear_bits |= PHY_INT_STATUS_BITS;
+
        old = (old & ~clear_bits) | set_bits;
        reg_write(ohci, OHCI1394_PhyControl,
                  OHCI1394_PhyControl_Write(addr, old));