dma: tegra: move smmu.h into SMMU driver
authorStephen Warren <swarren@nvidia.com>
Tue, 4 Sep 2012 22:36:15 +0000 (16:36 -0600)
committerJoerg Roedel <joerg.roedel@amd.com>
Tue, 18 Sep 2012 10:40:57 +0000 (12:40 +0200)
There's no need to place these defines into arch/arm/mach-tegra/include/.
Move them into the SMMU driver to clean up mach-tegra, as a pre-requisite
for single-zImage.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
arch/arm/mach-tegra/include/mach/smmu.h [deleted file]
drivers/iommu/tegra-smmu.c

diff --git a/arch/arm/mach-tegra/include/mach/smmu.h b/arch/arm/mach-tegra/include/mach/smmu.h
deleted file mode 100644 (file)
index dad403a..0000000
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * IOMMU API for SMMU in Tegra30
- *
- * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-#ifndef        MACH_SMMU_H
-#define        MACH_SMMU_H
-
-enum smmu_hwgrp {
-       HWGRP_AFI,
-       HWGRP_AVPC,
-       HWGRP_DC,
-       HWGRP_DCB,
-       HWGRP_EPP,
-       HWGRP_G2,
-       HWGRP_HC,
-       HWGRP_HDA,
-       HWGRP_ISP,
-       HWGRP_MPE,
-       HWGRP_NV,
-       HWGRP_NV2,
-       HWGRP_PPCS,
-       HWGRP_SATA,
-       HWGRP_VDE,
-       HWGRP_VI,
-
-       HWGRP_COUNT,
-
-       HWGRP_END = ~0,
-};
-
-#define HWG_AFI                (1 << HWGRP_AFI)
-#define HWG_AVPC       (1 << HWGRP_AVPC)
-#define HWG_DC         (1 << HWGRP_DC)
-#define HWG_DCB                (1 << HWGRP_DCB)
-#define HWG_EPP                (1 << HWGRP_EPP)
-#define HWG_G2         (1 << HWGRP_G2)
-#define HWG_HC         (1 << HWGRP_HC)
-#define HWG_HDA                (1 << HWGRP_HDA)
-#define HWG_ISP                (1 << HWGRP_ISP)
-#define HWG_MPE                (1 << HWGRP_MPE)
-#define HWG_NV         (1 << HWGRP_NV)
-#define HWG_NV2                (1 << HWGRP_NV2)
-#define HWG_PPCS       (1 << HWGRP_PPCS)
-#define HWG_SATA       (1 << HWGRP_SATA)
-#define HWG_VDE                (1 << HWGRP_VDE)
-#define HWG_VI         (1 << HWGRP_VI)
-
-#endif /* MACH_SMMU_H */
index 7e42c71c1ffc90e05e42987cf3bb4f4ed358f59a..e1d17feb52b83258e0f36aab845a9aa6fc09050d 100644 (file)
 #include <asm/cacheflush.h>
 
 #include <mach/iomap.h>
-#include <mach/smmu.h>
 #include <mach/tegra-ahb.h>
 
+enum smmu_hwgrp {
+       HWGRP_AFI,
+       HWGRP_AVPC,
+       HWGRP_DC,
+       HWGRP_DCB,
+       HWGRP_EPP,
+       HWGRP_G2,
+       HWGRP_HC,
+       HWGRP_HDA,
+       HWGRP_ISP,
+       HWGRP_MPE,
+       HWGRP_NV,
+       HWGRP_NV2,
+       HWGRP_PPCS,
+       HWGRP_SATA,
+       HWGRP_VDE,
+       HWGRP_VI,
+
+       HWGRP_COUNT,
+
+       HWGRP_END = ~0,
+};
+
+#define HWG_AFI                (1 << HWGRP_AFI)
+#define HWG_AVPC       (1 << HWGRP_AVPC)
+#define HWG_DC         (1 << HWGRP_DC)
+#define HWG_DCB                (1 << HWGRP_DCB)
+#define HWG_EPP                (1 << HWGRP_EPP)
+#define HWG_G2         (1 << HWGRP_G2)
+#define HWG_HC         (1 << HWGRP_HC)
+#define HWG_HDA                (1 << HWGRP_HDA)
+#define HWG_ISP                (1 << HWGRP_ISP)
+#define HWG_MPE                (1 << HWGRP_MPE)
+#define HWG_NV         (1 << HWGRP_NV)
+#define HWG_NV2                (1 << HWGRP_NV2)
+#define HWG_PPCS       (1 << HWGRP_PPCS)
+#define HWG_SATA       (1 << HWGRP_SATA)
+#define HWG_VDE                (1 << HWGRP_VDE)
+#define HWG_VI         (1 << HWGRP_VI)
+
 /* bitmap of the page sizes currently supported */
 #define SMMU_IOMMU_PGSIZES     (SZ_4K)