MIPS: Netlogic: Remove unused EIMR/EIRR functions

Remove the definitions of {read,write}_c0_{eirr,eimr}. These functions
are now unused after the PIC and IRQ code has been updated to use
optimized EIMR/EIRR functions which work on both 32-bit and 64-bit.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5021/
Acked-by: John Crispin <blogic@openwrt.org>

diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h
index 69d18a0e0581c10323860b220a0e800f022e8373..f299d31d7c1a3faf7eeffd22f7409cce90954cd6 100644 (file)
--- a/arch/mips/include/asm/netlogic/mips-extns.h
+++ b/arch/mips/include/asm/netlogic/mips-extns.h
@@ -38,10 +38,6 @@
 /*
  * XLR and XLP interrupt request and interrupt mask registers
  */
-#define read_c0_eirr()         __read_64bit_c0_register($9, 6)
-#define read_c0_eimr()         __read_64bit_c0_register($9, 7)
-#define write_c0_eirr(val)     __write_64bit_c0_register($9, 6, val)
-
 /*
  * NOTE: Do not save/restore flags around write_c0_eimr().
  * On non-R2 platforms the flags has part of EIMR that is shadowed in STATUS
@@ -125,7 +121,7 @@ static inline uint64_t read_c0_eirr_and_eimr(void)
        uint64_t val;
 
 #ifdef CONFIG_64BIT
-       val = read_c0_eimr() & read_c0_eirr();
+       val = __read_64bit_c0_register($9, 6) & __read_64bit_c0_register($9, 7);
 #else
        __asm__ __volatile__(
                ".set   push\n\t"
@@ -140,7 +136,6 @@ static inline uint64_t read_c0_eirr_and_eimr(void)
                ".set   pop"
                : "=r" (val));
 #endif
-
        return val;
 }