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[PARISC] Explicitly specify sr4 when flushing kernel space
authorMatthew Wilcox <willy@parisc-linux.org>
Sat, 22 Oct 2005 02:56:14 +0000 (22:56 -0400)
committerKyle McMartin <kyle@parisc-linux.org>
Sat, 22 Oct 2005 02:56:14 +0000 (22:56 -0400)
Specify sr4 when flushing kernel space (we could equally well use sr5-7,
but must not use sr0).

Signed-off-by: Matthew Wilcox <willy@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
arch/parisc/kernel/pacache.S patch | blob | blame | history

diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 08cde5addfca7409b77e4c10403567eb45c8261e..9534ee17b9bec789b77bb9da7a089e9ef11bfa1f 100644 (file)
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -949,23 +949,23 @@ flush_kernel_icache_page:
        sub             %r25, %r23, %r25
 
 
-1:      fic,m          %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
-       fic,m           %r23(%r26)
+1:      fic,m          %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
+       fic,m           %r23(%sr4, %r26)
        CMPB<<          %r26, %r25, 1b
-       fic,m           %r23(%r26)
+       fic,m           %r23(%sr4, %r26)
 
        sync
        bv              %r0(%r2)
@@ -987,7 +987,7 @@ flush_kernel_icache_range_asm:
        ANDCM           %r26, %r21, %r26
 
 1:      CMPB<<,n       %r26, %r25, 1b
-       fic,m           %r23(%r26)
+       fic,m           %r23(%sr4, %r26)
 
        sync
        bv              %r0(%r2)