struct s3c2410_wdt {
struct device *dev;
- struct clk *clock;
+ struct clk *rate_clock;
+ struct clk *gate_clock;
void __iomem *reg_base;
unsigned int count;
spinlock_t lock;
unsigned int timeout)
{
struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
- unsigned long freq = clk_get_rate(wdt->clock);
+ unsigned long freq = clk_get_rate(wdt->rate_clock);
unsigned int count;
unsigned int divisor = 1;
unsigned long wtcon;
goto err;
}
- wdt->clock = devm_clk_get(dev, "watchdog");
- if (IS_ERR(wdt->clock)) {
- dev_err(dev, "failed to find watchdog clock source\n");
- ret = PTR_ERR(wdt->clock);
+ DBG("probe: mapped reg_base=%p\n", wdt->reg_base);
+
+ wdt->rate_clock = devm_clk_get(dev, "rate_watchdog");
+ if (IS_ERR(wdt->rate_clock)) {
+ dev_err(dev, "failed to find watchdog rate clock source\n");
+ ret = PTR_ERR(wdt->rate_clock);
goto err;
}
- ret = clk_prepare_enable(wdt->clock);
+ wdt->gate_clock = devm_clk_get(dev, "gate_watchdog");
+ if (IS_ERR(wdt->gate_clock)) {
+ dev_err(dev, "failed to find watchdog gate clock source\n");
+ ret = PTR_ERR(wdt->gate_clock);
+ goto err;
+ }
+
+ ret = clk_prepare_enable(wdt->gate_clock);
if (ret < 0) {
- dev_err(dev, "failed to enable clock\n");
+ dev_err(dev, "failed to enable gate clock\n");
return ret;
}
wdt->wdt_device.min_timeout = 1;
- wdt->wdt_device.max_timeout = s3c2410wdt_max_timeout(wdt->clock);
+ wdt->wdt_device.max_timeout = s3c2410wdt_max_timeout(wdt->rate_clock);
ret = s3c2410wdt_cpufreq_register(wdt);
if (ret < 0) {
s3c2410wdt_cpufreq_deregister(wdt);
err_clk:
- clk_disable_unprepare(wdt->clock);
-
+ clk_disable_unprepare(wdt->gate_clock);
+ wdt->rate_clock = NULL;
+ wdt->gate_clock = NULL;
err:
return ret;
}
s3c2410wdt_cpufreq_deregister(wdt);
- clk_disable_unprepare(wdt->clock);
+ clk_disable_unprepare(wdt->rate_clock);
+ wdt->rate_clock = NULL;
+ wdt->gate_clock = NULL;
return 0;
}