ncr5380: Remove BOARD_REQUIRES_NO_DELAY macro
authorFinn Thain <fthain@telegraphics.com.au>
Wed, 23 Mar 2016 10:10:16 +0000 (21:10 +1100)
committerMartin K. Petersen <martin.petersen@oracle.com>
Mon, 11 Apr 2016 20:57:09 +0000 (16:57 -0400)
The io_recovery_delay macro is intended to insert a microsecond delay
between the chip register accesses that begin a DMA operation. This
is reportedly needed for some ISA boards.

Reverse the sense of the macro test so that in the common case,
where no delay is required, drivers need not define the macro.

Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Tested-by: Michael Schmitz <schmitzmic@gmail.com>
Tested-by: Ondrej Zary <linux@rainbow-software.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/NCR5380.c
drivers/scsi/dtc.h
drivers/scsi/g_NCR5380.h
drivers/scsi/t128.h

index fc86cde2d28e17256ee0de725be44877df09875f..014a01f6875fc5bd539b87edacf6fec3e868aa94 100644 (file)
  * tagged queueing)
  */
 
-#ifdef BOARD_REQUIRES_NO_DELAY
-#define io_recovery_delay(x)
-#else
-#define io_recovery_delay(x)   udelay(x)
-#endif
-
 /*
  * Design
  *
  * possible) function may be used.
  */
 
+#ifndef NCR5380_io_delay
+#define NCR5380_io_delay(x)
+#endif
+
 static int do_abort(struct Scsi_Host *);
 static void do_reset(struct Scsi_Host *);
 
@@ -1468,14 +1466,14 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
         */
 
        if (p & SR_IO) {
-               io_recovery_delay(1);
+               NCR5380_io_delay(1);
                NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
        } else {
-               io_recovery_delay(1);
+               NCR5380_io_delay(1);
                NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
-               io_recovery_delay(1);
+               NCR5380_io_delay(1);
                NCR5380_write(START_DMA_SEND_REG, 0);
-               io_recovery_delay(1);
+               NCR5380_io_delay(1);
        }
 
 /*
index 1bc638730dda9fca0b18f85426390287b79428b3..718f95adcec6fb3e82e88c6fe68f6413e43b41ce 100644 (file)
@@ -28,6 +28,8 @@
 #define NCR5380_bus_reset              dtc_bus_reset
 #define NCR5380_info                   dtc_info
 
+#define NCR5380_io_delay(x)            udelay(x)
+
 /* 15 12 11 10
    1001 1100 0000 0000 */
 
index a231a8c52d87874d312657ffa803fa1d67436501..637740f4c6c799c2c69929b327a5fac9f81c6ce7 100644 (file)
@@ -71,6 +71,8 @@
 #define NCR5380_pwrite generic_NCR5380_pwrite
 #define NCR5380_info generic_NCR5380_info
 
+#define NCR5380_io_delay(x)            udelay(x)
+
 #define BOARD_NCR5380  0
 #define BOARD_NCR53C400        1
 #define BOARD_NCR53C400A 2
index c369b50de746717b9c93cc45579ad4a7b6817d7e..4caea9d62ac4dea27bdcf65f2c01ec335529655c 100644 (file)
@@ -84,6 +84,8 @@
 #define NCR5380_bus_reset t128_bus_reset
 #define NCR5380_info t128_info
 
+#define NCR5380_io_delay(x)            udelay(x)
+
 /* 15 14 12 10 7 5 3
    1101 0100 1010 1000 */