[8895] thermal: samsung: Set MUX_ADDR with sensor type
authorSoomin Kim <sm8326.kim@samsung.com>
Thu, 28 Jul 2016 06:01:51 +0000 (15:01 +0900)
committerChungwoo Park <cww.park@samsung.com>
Mon, 21 May 2018 08:13:12 +0000 (17:13 +0900)
MUX_ADDR register should be set according to sensor type
to operate normally. In case of TEM1455X, this value must
be 0x2 and in case of TEM1456X must be 0x6.

Change-Id: If9b2bad88968c02a1276a77fbef8f130d44961ee
Signed-off-by: Soomin Kim <sm8326.kim@samsung.com>
drivers/thermal/samsung/exynos_tmu.c
include/dt-bindings/thermal/thermal_exynos.h

index 146bf82ed7dbdb6b8a3471b9b5340e4081996e82..1f83df6ae62c9858471de51e49db8225277d0aa6 100644 (file)
@@ -44,6 +44,7 @@
 #include <linux/exynos-ss.h>
 #include <soc/samsung/tmu.h>
 #include <soc/samsung/ect_parser.h>
+#include <dt-bindings/thermal/thermal_exynos.h>
 
 #include "exynos_tmu.h"
 #include "../thermal_core.h"
@@ -68,6 +69,8 @@
 #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK  0xf
 #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
 #define EXYNOS_TMU_CORE_EN_SHIFT       0
+#define EXYNOS_TMU_MUX_ADDR_SHIFT      20
+#define EXYNOS_TMU_MUX_ADDR_MASK       0x3
 
 #define EXYNOS_TMU_TRIP_MODE_SHIFT     13
 #define EXYNOS_TMU_TRIP_MODE_MASK      0x7
@@ -578,6 +581,7 @@ static void exynos8895_tmu_control(struct platform_device *pdev, bool on)
        unsigned int t_buf_vref_sel, t_buf_slope_sel;
        int i;
        u32 avg_con, avg_sel;
+       u32 mux_val;
 
        con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
        con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
@@ -604,6 +608,15 @@ static void exynos8895_tmu_control(struct platform_device *pdev, bool on)
        else
                avg_con |= ((avg_con & EXYNOS_TMU_AVG_MODE_MASK) | EXYNOS_TMU_AVG_MODE_4);
 
+       /* Set MUX_ADDR SFR according to sensor_type */
+       switch (data->pdata->sensor_type) {
+               case TEM1456X :
+               case TEM1455X :
+                       mux_val = (data->pdata->sensor_type << EXYNOS_TMU_MUX_ADDR_SHIFT);
+                       con |= (con & ~(EXYNOS_TMU_MUX_ADDR_MASK << EXYNOS_TMU_MUX_ADDR_SHIFT)) | mux_val;
+                       break;
+       }
+
        if (on) {
                con |= (t_buf_vref_sel << EXYNOS_TMU_REF_VOLTAGE_SHIFT);
                con |= (t_buf_slope_sel << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
index 015a8b2a529822a4d17e9bdee1ade5fd1defa5ee..1a07390f9938400b706d1c1ebe9a3eec19a71a6f 100644 (file)
@@ -23,4 +23,8 @@
 #define TYPE_TWO_POINT_TRIMMING 1
 #define TYPE_NONE 2
 
+#define TEM1002X                       0x0
+#define TEM1455X                       0x2
+#define TEM1456X                       0x6
+
 #endif /* _EXYNOS_THERMAL_TMU_DT_H */