drm/radeon: fix init ordering for r600+
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 12:58:20 +0000 (08:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:31:15 +0000 (16:31 -0400)
The vram scratch buffer needs to be initialized
before the mc is programmed otherwise we program
0 as the GPU address of the default GPU fault
page.  In most cases we put vram at zero anyway and
reserve a page for the legacy vga buffer so in practice
this shouldn't cause any problems, but better to make
it correct.

Was changed in:
6fab3febf6d949b0a12b1e4e73db38e4a177a79e

Reported-by: FrankR Huang <FrankR.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/radeon/cik.c
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/ni.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/rv770.c
drivers/gpu/drm/radeon/si.c

index 79124f81c00ebdf0b3e6b5fdcea770bf14794cce..148c539684bb8b926a73b83e7d3e56b3560ee332 100644 (file)
@@ -6951,6 +6951,11 @@ static int cik_startup(struct radeon_device *rdev)
        /* enable aspm */
        cik_program_aspm(rdev);
 
+       /* scratch needs to be initialized before MC */
+       r = r600_vram_scratch_init(rdev);
+       if (r)
+               return r;
+
        cik_mc_program(rdev);
 
        if (rdev->flags & RADEON_IS_IGP) {
@@ -6980,10 +6985,6 @@ static int cik_startup(struct radeon_device *rdev)
                }
        }
 
-       r = r600_vram_scratch_init(rdev);
-       if (r)
-               return r;
-
        r = cik_pcie_gart_enable(rdev);
        if (r)
                return r;
index 1832136894786c213193f35c484cc4818cef6732..6398c1f76fb84b91cf9128442e6d619e5e3c23c9 100644 (file)
@@ -5053,6 +5053,11 @@ static int evergreen_startup(struct radeon_device *rdev)
        /* enable aspm */
        evergreen_program_aspm(rdev);
 
+       /* scratch needs to be initialized before MC */
+       r = r600_vram_scratch_init(rdev);
+       if (r)
+               return r;
+
        evergreen_mc_program(rdev);
 
        if (ASIC_IS_DCE5(rdev)) {
@@ -5078,10 +5083,6 @@ static int evergreen_startup(struct radeon_device *rdev)
                }
        }
 
-       r = r600_vram_scratch_init(rdev);
-       if (r)
-               return r;
-
        if (rdev->flags & RADEON_IS_AGP) {
                evergreen_agp_enable(rdev);
        } else {
index 69499fff06b0d0bea96d098d737213ca64f6517f..d60049efd7ac1fd981b626e37a407a40349e3b76 100644 (file)
@@ -1863,6 +1863,11 @@ static int cayman_startup(struct radeon_device *rdev)
        /* enable aspm */
        evergreen_program_aspm(rdev);
 
+       /* scratch needs to be initialized before MC */
+       r = r600_vram_scratch_init(rdev);
+       if (r)
+               return r;
+
        evergreen_mc_program(rdev);
 
        if (rdev->flags & RADEON_IS_IGP) {
@@ -1889,10 +1894,6 @@ static int cayman_startup(struct radeon_device *rdev)
                }
        }
 
-       r = r600_vram_scratch_init(rdev);
-       if (r)
-               return r;
-
        r = cayman_pcie_gart_enable(rdev);
        if (r)
                return r;
index 087cff444ba25712f977a30f05157b457494242f..b72d4d717a723ae63c8cb64a1f4cce6dce33ca54 100644 (file)
@@ -2698,6 +2698,11 @@ static int r600_startup(struct radeon_device *rdev)
        /* enable pcie gen2 link */
        r600_pcie_gen2_enable(rdev);
 
+       /* scratch needs to be initialized before MC */
+       r = r600_vram_scratch_init(rdev);
+       if (r)
+               return r;
+
        r600_mc_program(rdev);
 
        if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) {
@@ -2708,10 +2713,6 @@ static int r600_startup(struct radeon_device *rdev)
                }
        }
 
-       r = r600_vram_scratch_init(rdev);
-       if (r)
-               return r;
-
        if (rdev->flags & RADEON_IS_AGP) {
                r600_agp_enable(rdev);
        } else {
index b811296462a3d6ee3a7919b0c476acd16b2c2321..9f5846743c9e0a26dbcf76662250bfb957f6ced1 100644 (file)
@@ -1658,6 +1658,11 @@ static int rv770_startup(struct radeon_device *rdev)
        /* enable pcie gen2 link */
        rv770_pcie_gen2_enable(rdev);
 
+       /* scratch needs to be initialized before MC */
+       r = r600_vram_scratch_init(rdev);
+       if (r)
+               return r;
+
        rv770_mc_program(rdev);
 
        if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) {
@@ -1668,10 +1673,6 @@ static int rv770_startup(struct radeon_device *rdev)
                }
        }
 
-       r = r600_vram_scratch_init(rdev);
-       if (r)
-               return r;
-
        if (rdev->flags & RADEON_IS_AGP) {
                rv770_agp_enable(rdev);
        } else {
index 89393ed593faa108bab61e2914253f0fb5e697f8..fe8bca6869007ea6b4b0c811592578e4bfa553ea 100644 (file)
@@ -6343,6 +6343,11 @@ static int si_startup(struct radeon_device *rdev)
        /* enable aspm */
        si_program_aspm(rdev);
 
+       /* scratch needs to be initialized before MC */
+       r = r600_vram_scratch_init(rdev);
+       if (r)
+               return r;
+
        si_mc_program(rdev);
 
        if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw ||
@@ -6360,10 +6365,6 @@ static int si_startup(struct radeon_device *rdev)
                return r;
        }
 
-       r = r600_vram_scratch_init(rdev);
-       if (r)
-               return r;
-
        r = si_pcie_gart_enable(rdev);
        if (r)
                return r;