dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4
authorSean Wang <sean.wang@mediatek.com>
Thu, 1 Mar 2018 03:27:50 +0000 (11:27 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 24 Apr 2018 07:34:14 +0000 (09:34 +0200)
commit 55a5fcafe3a94e8a0777bb993d09107d362258d2 upstream.

Just add binding for a fixed-factor clock axisel_d4, which would be
referenced by PWM devices on MT7623 or MT2701 SoC.

Cc: stable@vger.kernel.org
Fixes: 1de9b21633d6 ("clk: mediatek: Add dt-bindings for MT2701 clocks")
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
include/dt-bindings/clock/mt2701-clk.h

index 2062c67e2e515845a1f2bbff6fbb6f934e8a00ca..a72db8d23ed6512f2393237e2e465fa3b81f1062 100644 (file)
 #define CLK_TOP_AUD_EXT1                       156
 #define CLK_TOP_AUD_EXT2                       157
 #define CLK_TOP_NFI1X_PAD                      158
-#define CLK_TOP_NR                             159
+#define CLK_TOP_AXISEL_D4                      159
+#define CLK_TOP_NR                             160
 
 /* APMIXEDSYS */