pinctrl: sh-pfc: r8a7796: Fix to delete MOD_SEL0 bit2 register definitions
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Wed, 12 Jul 2017 16:55:45 +0000 (01:55 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 17 Jul 2017 09:02:40 +0000 (11:02 +0200)
This patch fixes the macro definitions of MOD_SEL0 bit2 register deleted.

This is a correction because MOD_SEL register specification for R8A7796
SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E.

Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7796.c

index 899675e19ab93744ba4c4642e1b9d5a232f37d2f..fda815789c72dfccb7e85523a98172a74cf8f0e4 100644 (file)
@@ -471,7 +471,6 @@ FM(IP16_31_28)      IP16_31_28      FM(IP17_31_28)  IP17_31_28
 #define MOD_SEL0_7_6           FM(SEL_DRIF0_0)         FM(SEL_DRIF0_1)         FM(SEL_DRIF0_2)         F_(0, 0)
 #define MOD_SEL0_5             FM(SEL_CANFD0_0)        FM(SEL_CANFD0_1)
 #define MOD_SEL0_4_3           FM(SEL_ADG_A_0)         FM(SEL_ADG_A_1)         FM(SEL_ADG_A_2)         FM(SEL_ADG_A_3)
-#define MOD_SEL0_2             FM(SEL_5LINE_0)         FM(SEL_5LINE_1)
 
 /* MOD_SEL1 */                 /* 0 */                 /* 1 */                 /* 2 */                 /* 3 */                 /* 4 */                 /* 5 */                 /* 6 */                 /* 7 */
 #define MOD_SEL1_31_30         FM(SEL_TSIF1_0)         FM(SEL_TSIF1_1)         FM(SEL_TSIF1_2)         FM(SEL_TSIF1_3)
@@ -540,7 +539,7 @@ MOD_SEL0_7_6 \
 MOD_SEL0_5             MOD_SEL1_5 \
 MOD_SEL0_4_3           MOD_SEL1_4 \
                        MOD_SEL1_3 \
-MOD_SEL0_2             MOD_SEL1_2 \
+                       MOD_SEL1_2 \
                        MOD_SEL1_1 \
                        MOD_SEL1_0              MOD_SEL2_0